Programmable preamble system and method

Abstract

A system includes a first communication device and a second communication device. The first communication device includes a programmable region. The programmable region of the first communication device is programmed so that an associated signal includes a number of preamble cycles. The second communication device also can include a programmable region. The programmable region of the second communication device can be programmed so that an associated signal includes a number of preamble cycles. The number of preamble cycles can be based on a variety of factors, such as the topology or implementation of the system. In an embodiment, the number of preamble cycles is associated with a data strobe signal, and data is not read or written in response to the data strobe signal until all of the preamble cycles have been transmitted and received.

1 . A digital communication method, the method comprising:
 determining a number of programmable preamble cycles for preconditioning a transmission path based on a plurality of criteria including physical characteristics of the transmission path;   programming a programmable region of a first communication device so that a first signal includes the number of preamble cycles;   communicating the first signal, wherein the number of programmable preamble cycles operate to condition the communication path when communicating the first signal; and   determining based on said plurality of criteria whether the number of programmable preamble cycles should be changed, and if the number should be changed, reprogramming the programmable region of the first communication device.   
     
     
         2 . The method of  claim 1 , further comprising programming a programmable region of a second communication device so that a second signal includes a number of programmable preamble cycles. 
     
     
         3 . The method of  claim 1 , further comprising programming a programmable register of a memory controller so that a data strobe signal includes the number of programmable preamble cycles. 
     
     
         4 . The method of  claim 1 , wherein the programming is based at least in part on a signal communication topology associated with the first communication device. 
     
     
         5 . The method of  claim 2 , further comprising programming the register of a memory device so that a data strobe signal includes the number of programmable preamble cycles. 
     
     
         6 . The method of  claim 2 , further comprising using the first communication device to program the second communication device so that an associated signal includes the number of programmable preamble cycles. 
     
     
         7 . The method of  claim 1 , further comprising providing the number of programmable preamble cycles to a plurality of components in a system, wherein one or more of the components utilize the number of programmable preamble cycles when communicating one or more signals. 
     
     
         8 . A system for enabling digital communication, the system comprising:
 a device having a programmable region that is programmed with a memory controller having a programmable register based on a determined number of programmable preamble cycles for preconditioning a transmission path based on a plurality of criteria including the physical characteristics of the transmission path, the device capable of communicating a first signal to a second device with the number of programmable preamble cycles operating to condition a communication path to the second device,   wherein the device assesses the number of programmable preamble cycles based on the plurality of criteria and reprograms the programmable region based on the assessment.   
     
     
         9 . The system of  claim 8  further comprising a data strobe signal that evidences the number of programmable preamble cycles. 
     
     
         10 . The system of  claim 8  wherein the programming is based on a signal communication topology associated with the device. 
     
     
         11 . The system of  claim 8  wherein the number of programmable preamble cycles is provided to a plurality of components in the system and wherein one or more components utilize the number of programmable preamble cycles when communicating one or more signals. 
     
     
         12 . The system of  claim 11  wherein the number of programmable preamble cycles is provided to a plurality of components in the system using a data strobe signal. 
     
     
         13 . The system of  claim 8  wherein the programmable region comprises an N-bit programmable register. 
     
     
         14 . The system of  claim 8  wherein the memory device is a synchronous double data rate (DDR) dynamic random access memory (DRAM). 
     
     
         15 . The system of  claim 8  wherein the programmable register is implemented using software. 
     
     
         16 . The system of  claim 8  wherein the programmable register is implemented using hardware. 
     
     
         17 . The system of  claim 8  wherein the programmable register is implemented using a combination of software and hardware. 
     
     
         18 . A computer-readable medium having stored thereon instructions which, when executed, communicate signals in a system including:
 determining a number of programmable preamble cycles for preconditioning a communication path;   programming a programmable region of a first communication device so that a first signal includes the number of preamble cycles;   communicating the first signal, wherein the number of programmable preamble cycles operate to condition the communication path when communicating the first signal; and   determining based on a plurality of criteria including physical characteristics of said communication path whether the number of programmable preamble cycles should be changed, and if the number should be changed, reprogramming the programmable region of the first communication device.   
     
     
         19 . The computer-readable medium of  claim 18 , further comprising programming a programmable register of a memory controller so that an associated signal includes the number of preamble cycles. 
     
     
         20 . The computer-readable medium of  claim 18 , further comprising programming a programmable register of a memory device so that an associated signal includes the number of preamble cycles. 
     
     
         21 . The computer-readable medium of  claim 18 , wherein the programming of the programmable register of the memory device is based at least in part on a signal communication topology associated with the first communication device. 
     
     
         22 . The computer-readable medium of  claim 18 , further comprising using the first communication device to program a second communication device, so that an associated signal includes the number of preamble cycles. 
     
     
         23 . The computer-readable medium of  claim 18 , further comprising programming a programmable register of a memory controller so that a data strobe signal includes the number of programmable preamble cycles.