Liquid crystal display and method thereof

Abstract

A liquid crystal display includes a first panel, a second panel facing and separated from the first panel, a liquid crystal layer interposed between the first and second panels, a plurality of sensor data lines formed on the second panel, a plurality of variable capacitors of which capacitance thereof is varied by pressure, the variable capacitors connected to the sensor data lines, a plurality of reference capacitors connected to the sensor data lines, and first reset transistors and second reset transistors connected to the sensor data lines and supplying a first reset voltage and a second reset voltage to the sensor data lines at different times, respectively.

1 - 27 . (canceled) 
     
     
         28 . A liquid crystal display comprising:
 a first panel;   a second panel facing and separated from the first panel;   a liquid crystal layer interposed between the first and second panels;   a plurality of sensor data lines disposed on the second panel;   a plurality of variable capacitors of which capacitance thereof is varied by pressure, the variable capacitors connected to the sensor data lines;   a plurality of reference capacitors connected to the sensor data lines; and   first reset transistors and second reset transistors connected to the sensor data lines and configured to supply a first reset voltage and a second reset voltage to the sensor data lines at different times in response to a first reset signal and a second reset signal, respectively.   
     
     
         29 . The liquid crystal display of  claim 28 , further comprising a plurality of output transistors connected to the sensor data lines and configured to generate output signals based on sensor data signals flowing through the sensor data lines. 
     
     
         30 . The liquid crystal display of  claim 29 , further comprising a sensing signal processor supplied with the output signals from the output transistors and generating sensing signals based on the output signals. 
     
     
         31 . The liquid crystal display of  claim 30 , wherein the first reset signal and the second reset signal comprise a gate-on voltage and a gate-off voltage for turning on and turning off the first reset transistors and the second reset transistors, respectively. 
     
     
         32 . The liquid crystal display of  claim 31 , wherein the variable capacitors comprise first capacitance electrodes formed on the first panel and second capacitance electrodes formed on the second panel;
 the first capacitance electrodes are supplied with a common voltage; and   the sensor data lines function as the second capacitance electrodes.   
     
     
         33 . The liquid crystal display of  claim 32 , wherein the common voltage has a high level and a low level, and swings between the high level and the low level by about 1H. 
     
     
         34 . The liquid crystal display of  claim 33 , wherein the gate-on voltage of the first reset signal is applied when the common voltage has a high level. 
     
     
         35 . The liquid crystal display of  claim 34 , wherein the gate-on voltage of the second reset signal is applied right next to an approximate 1H or in a subsequent approximate 1H after the sensing signal is read. 
     
     
         36 . The liquid crystal display of  claim 33 , wherein the gate-on voltage of the first reset signal is applied when the common voltage has a low level. 
     
     
         37 . The liquid crystal display of  claim 36 , wherein the gate-on voltage of the second reset signal is applied right next to an approximate 1H or in a subsequent approximate 1H after the sensing signal is read. 
     
     
         38 . The liquid crystal display of  claim 33 , wherein the sensing signal processor generates the sensing signals within a predetermined time after the first reset transistors are turned off. 
     
     
         39 . The liquid crystal display of  claim 38 , wherein the common voltage maintains one of the high level and the low level for the predetermined time. 
     
     
         40 . The liquid crystal display of  claim 39 , wherein the predetermined time is at least about 1H. 
     
     
         41 . The liquid crystal display of  claim 30 , wherein the first reset transistors apply the first reset voltage to the sensor data lines before the sensing signal processor generates the sensing signals. 
     
     
         42 . The liquid crystal display of  claim 41 , wherein the second reset transistors apply the second reset voltage to the sensor data lines after the sensing signal processor generates the sensing signals. 
     
     
         43 . A liquid crystal display comprising:
 a first panel;   a second panel facing and separated from the first panel;   a liquid crystal layer interposed between the first and second panels;   a plurality of sensor data lines formed on the second panel;   a plurality of variable capacitors of which capacitance thereof is varied by pressure, the plurality of variable capacitors connected to the sensor data lines;   a plurality of reference capacitors connected to the sensor data lines;   a plurality of output transistors connected to the sensor data lines and generating output signals based on sensor data signals flowing through the sensor data lines;   a plurality of current sources connected to the output transistors and flowing a constant current; and   reset transistors connected to the sensor data lines and configured to supply a reset voltage to the sensor data lines in response to a reset signal.   
     
     
         44 . The liquid crystal display of  claim 43 , further comprising a sensing signal processor connected to the output transistors and the current sources and generating sensing signals based on the output signals and the constant current. 
     
     
         45 . The liquid crystal display of  claim 44 , wherein the reset signal comprises a gate-on voltage and a gate-off voltage for turning on and turning off the reset transistors. 
     
     
         46 . A liquid crystal panel assembly comprising;
 the liquid crystal display of claim  1 ; and   operating units operating the liquid crystal display.   
     
     
         47 . The liquid crystal panel assembly of  claim 46 ,
 wherein the operating units are in at least one integrated circuit chip mounted on the liquid crystal panel assembly.   
     
     
         48 . The liquid crystal panel assembly of  claim 47 ,
 wherein the liquid crystal panel assembly is divided into a display area, a periphery area, and an exposed area; and   the integrated circuit chip mounted onto the exposed area.   
     
     
         49 . The liquid crystal panel assembly of  claim 46 ,
 wherein the operating units are integrated with the liquid crystal panel assembly along with the sensor data lines, the first reset transistors, and the second reset transistors.