Semiconductor device, and method of manufacturing the same

Abstract

A semiconductor device has a substrate; and an N-channel MIS transistor and a P-channel MIS transistor provided on the same substrate; each of the N-channel MIS transistor and the P-channel MIS transistor having a Hf-containing, high-k gate insulating film, and a gate electrode provided over the high-k gate insulating film, the N-channel MIS transistor having a silicon oxide film or a silicon oxynitride film, which contains a first work function adjusting element, provided between the substrate and the high-k gate insulating film, and, the P-channel MIS transistor having a silicon oxide film or a silicon oxynitride film, which contains the first work function adjusting element same as that contained in the N-channel MIS transistor, provided between the high-k gate insulating film and the gate electrode.

1 . A semiconductor device comprising:
 a substrate; and   an N-channel MIS transistor and a P-channel MIS transistor provided on the same substrate;   each of the N-channel MIS transistor and the P-channel MIS transistor having a Hf-containing, high-k gate insulating film, and a gate electrode provided over the high-k gate insulating film,   the N-channel MIS transistor having a silicon oxide film or a silicon oxynitride film, which contains a first work function adjusting element, provided between the substrate and the high-k gate insulating film, and, the P-channel MIS transistor having a silicon oxide film or a silicon oxynitride film, which contains the first work function adjusting element same as that contained in the N-channel MIS transistor, provided between the high-k gate insulating film and the gate electrode.   
     
     
         2 . The semiconductor device according to  claim 1 ,
 wherein the first work function adjusting element comprising at least one element selected from the group consisting of La, Y and Mg.   
     
     
         3 . A semiconductor device comprising:
 a substrate; and   a P-channel MIS transistor provided over the substrate,   the P-channel MIS transistor having a Hf-containing, high-k gate insulating film, and a gate electrode provided over the high-k gate insulating film, and   the P-channel MIS transistor having a silicon oxide film or a silicon oxynitride film, which contains a first work function adjusting element comprising at least one element selected from the group consisting of La, Y and Mg, provided between the high-k gate insulating film and the gate electrode.   
     
     
         4 . A semiconductor device according to  claim 1 ,
 wherein the high-k gate insulating film contains a diffusion-suppressive element capable of suppressing the first work function adjusting element from diffusing.   
     
     
         5 . A semiconductor device comprising:
 a substrate; and   a N-channel MIS transistor and a P-channel MIS transistor provided over the same substrate,   each of the N-channel MIS transistor and the P-channel MIS transistor having a Hf-containing, high-k gate insulating film, and a gate electrode provided over the high-k gate insulating film,   the P-channel MIS transistor having a silicon oxide film or a silicon oxynitride film, which contains a second work function adjusting element, provided between the substrate and the high-k gate insulating film, and, the N-channel MIS transistor having a silicon oxide film or a silicon oxynitride film, which contains the second work function adjusting element same as that contained in the P-channel MIS transistor, provided between the high-k gate insulating film and the gate electrode.   
     
     
         6 . The semiconductor device according to  claim 5 ,
 wherein the second work function adjusting element comprises Al.   
     
     
         7 . The semiconductor device according to  claim 5 ,
 wherein the high-k gate insulating film contains a diffusion-suppressive element capable of suppressing the second work function adjusting element from diffusing.   
     
     
         8 . The semiconductor device according to  claim 4 ,
 wherein the diffusion-suppressive element is nitrogen.   
     
     
         9 . The semiconductor device according to  claim 1 ,
 wherein the high-k gate insulating film is a HfSiON film or a HfON film.   
     
     
         10 . The semiconductor device according to  claim 1 ,
 wherein the gate electrode contains a TiN layer.   
     
     
         11 . A method of manufacturing a semiconductor device, the method comprising:
 forming, in an N-channel region of a substrate having the N-channel region and a P-channel region formed therein, a silicon oxide film or a silicon oxynitride film which contains a first work function adjusting element, a Hf-containing, high-k gate insulating film, and a gate electrode; as well as forming, in the P-channel region of the substrate, a Hf-containing, high-k gate insulating film, a silicon oxide film or a silicon oxynitride film which contains the first work function adjusting element same as that used in the N-channel region, and a gate electrode.   
     
     
         12 . The method of manufacturing a semiconductor device according to  claim 11 , comprising:
 forming the silicon oxide film or the silicon oxynitride film which contains the first work function adjusting element, in the N-channel region of the substrate having the N-channel region and the P-channel region formed therein;   forming the Hf-containing, high-k gate insulating film in the N-channel region and in the P-channel region;   forming the silicon oxide film or the silicon oxynitride film which contains the first work function adjusting element same as that used in the N-channel region, over the high-k gate insulating film in the P-channel region; and   forming the gate electrodes respectively in the N-channel region and in the P-channel region.   
     
     
         13 . The method of manufacturing a semiconductor device according to  claim 11 , comprising:
 forming the silicon oxide film or the silicon oxynitride film, in the N-channel region and in the P-channel region of the substrate having the N-channel region and the P-channel region formed therein;   forming the high-k gate insulating film in the N-channel region and in the P-channel region;   selectively introducing a diffusion-suppressive element capable of suppressing the first work function adjusting element from diffusing, into the high-k gate insulating film in the P-channel region, using a resist mask;   forming a film containing the first work function adjusting element, over the high-k gate insulating film which is formed in the N-channel region and in the P-channel region;   forming the silicon oxide film or the silicon oxynitride film, over the film containing the first work function adjusting element which is formed in the P-channel region;   annealing the thus-obtained article; and   forming the gate electrodes respectively in the N-channel region and in the P-channel region.   
     
     
         14 . The method of manufacturing a semiconductor device according to  claim 11 ,
 wherein the first work function adjusting element comprises at least one element selected from the group consisting of La, Y and Mg.   
     
     
         15 . A method of manufacturing a semiconductor device, the method comprising:
 forming, in a P-channel region of a substrate having an N-channel region and the P-channel region formed therein, a silicon oxide film or a silicon oxynitride film which contains a second work function adjusting element, a Hf-containing, high-k gate insulating film, and a gate electrode; as well as forming, in the N-channel region of the substrate, a Hf-containing, high-k gate insulating film, a silicon oxide film or a silicon oxynitride film which contains the second work function adjusting element same as that used in the P-channel region, and a gate electrode.   
     
     
         16 . The method of manufacturing a semiconductor device according to  claim 15 , comprising:
 forming the silicon oxide film or the silicon oxynitride film which contains the second work function adjusting element, in the P-channel region of the substrate having the N-channel region and the P-channel region formed therein;   forming the Hf-containing, high-k gate insulating film in the N-channel region and in the P-channel region;   forming the silicon oxide film or the silicon oxynitride film which contains the second work function adjusting element same as that used in the P-channel region, over the high-k gate insulating film in the N-channel region; and   forming the gate electrodes respectively in the N-channel region and in the P-channel region.   
     
     
         17 . The method of manufacturing a semiconductor device according to  claim 15 , comprising:
 forming the silicon oxide film or the silicon oxynitride film, in the N-channel region and in the P-channel region of the substrate having the N-channel region and the P-channel region formed therein;   forming the high-k gate insulating film, in the N-channel region and in the P-channel region;   selectively introducing a diffusion-suppressive element capable of suppressing the second work function adjusting element from diffusing, into the high-k gate insulating film in the N-channel region, using a resist mask;   forming a film containing the second work function adjusting element, over the high-k gate insulating film which is formed in the N-channel region and in the P-channel region;   forming the silicon oxide film or the silicon oxynitride film, over the film containing the second work function adjusting element which is formed in the N-channel region;   annealing the thus-obtained article; and   forming the gate electrode respectively in the N-channel region and in the P-channel region.   
     
     
         18 . The method of manufacturing a semiconductor device according to  claim 15 ,
 wherein the second work function adjusting element comprises Al.   
     
     
         19 . The method of manufacturing a semiconductor device according to  claim 13 ,
 wherein the diffusion-suppressive element is nitrogen.   
     
     
         20 . The method of manufacturing a semiconductor device according to  claim 11 ,
 wherein the high-k gate insulating film is a HfSiON film or a HfON film.   
     
     
         21 . The method of manufacturing a semiconductor device according to  claim 11 ,
 wherein the gate electrode contains a TiN layer.   
     
     
         22 . The method of manufacturing a semiconductor device according to  claim 13 ,
 wherein the step of selectively introducing the diffusion-suppressive element adopts plasma irradiation or ion implantation.