US2012061831A1PendingUtilityA1

Semiconductor package and method for making the same

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Assignee: SHEN YU-NUNGPriority: Feb 1, 2008Filed: Nov 22, 2011Published: Mar 15, 2012
Est. expiryFeb 1, 2028(~1.6 yrs left)· nominal 20-yr term from priority
Inventors:Yu-Nung Shen
H10W 90/722H10W 72/9415H10W 72/9223H10W 72/952H10W 72/942H10W 72/923H10W 72/922H10W 72/241H10W 72/0198H10W 72/20H10W 72/01H10W 90/00
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Claims

Abstract

A semiconductor package includes: a semiconductor substrate; an inner insulator layer formed on the substrate; at least one internal wiring extending from a front side of the substrate along one of lateral sides of the substrate to a rear side of the substrate; a first outer insulator layer disposed at the front side of the substrate, formed on the internal wiring, and formed with at least one wire-connecting hole; and a second outer insulator layer disposed at the rear side of the substrate, formed on the internal wiring, and formed with at least one wire-connecting hole which exposes a portion of the internal wiring.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . A semiconductor package comprising:
 a semiconductor substrate having a pad-mounting face and at least one bonding pad formed on said pad-mounting face;   an inner insulator layer formed on said pad-mounting face and formed with at least one pad-aligned hole that exposes said bonding pad;   a wire-defining layer formed on said inner insulator layer and formed with at least one wire-defining hole that exposes a portion of said inner insulator layer and that is in spatial communication with and that is transverse to said pad-aligned hole;   at least one internal wiring connected to said bonding pad and extending therefrom through said pad-aligned hole and into said wire-defining hole; and   an outer insulator layer formed on said wire-defining layer and said internal wiring and formed with at least one wire-connecting hole which exposes a portion of said internal wiring;   wherein said inner insulator layer and said wire-defining layer cooperatively form a structure that has a trapezoidal cross-section.   
     
     
         2 . The semiconductor package of  claim 1 , further comprising at least one conductive post extending outwardly from said internal wiring through said wire-connecting hole. 
     
     
         3 . The semiconductor package of  claim 1 , wherein said internal wiring is made from a conductive paste. 
     
     
         4 . The semiconductor package of  claim 1 , wherein said bonding pad is provided with a metal layer thereon, said internal wiring being connected to said metal layer. 
     
     
         5 . A method for making semiconductor packages, comprising:
 forming an inner insulator layer on a pad-mounting face of a semiconductor substrate;   forming a plurality of pad-aligned holes in the inner insulator layer such that the pad-aligned holes expose bonding pads on the pad-mounting face of the semiconductor substrate, respectively, and a plurality of side holes in the inner insulator layer such that the side holes are disposed respectively at cutting lines of the semiconductor substrate;   forming a wire-defining layer on the inner insulator layer;   forming a plurality of wire-defining holes in the wire-defining layer such that each of the wire-defining holes extends between a respective one of the pad-aligned holes and a respective one of the side holes and communicates spatially with the respective one of the pad-aligned holes, and a plurality of side through-holes in the wire-defining layer such that each of the side through-holes is disposed at a respective one of the cutting lines and communicates spatially with a respective one of the side holes;   forming a plurality of conductive traces such that each of the conductive traces fills a respective one of the pad-aligned holes to connect with a respective one of the bonding pads, and further fills a respective one of the wire-defining holes;   forming an outer insulator layer to cover the wire-defining layer and the conductive traces and to fill the side holes and the side through-holes;   forming a plurality of wire-connecting holes in the outer insulator layer to expose portions of the conductive traces, respectively;   forming a plurality of conductive posts such that each of the conductive posts fills a respective one of the wire-connecting holes in the outer insulator layer to connect with a respective one of the conductive traces and extends outwardly of the respective one of the wire-connecting holes in the outer insulator layer; and   cutting an assembly of the inner insulator layer, the outer insulator layer, the wire-defining layer, the conductive traces, the conductive posts, and the semiconductor substrate along the cutting lines so as to form the semiconductor packages;   wherein each of the side holes cooperates with the respective one of the side through-holes to form a hole shape that permits an assembly of the wire-forming layer and the inner insulator layer of each of the semiconductor packages to have a trapezoidal cross-section.   
     
     
         6 . The method of  claim 5 , further comprising forming a metal layer on each of the bonding pads prior to formation of the wire-defining layer.

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