Method for fabricating semiconductor device using dual damascene process

Abstract

A method for fabricating a semiconductor device using a dual damascene process is provided. The method includes forming a dielectric layer over a conductive layer, forming a via hole exposing the conducting layer by selectively etching the dielectric layer, projecting a portion of the dielectric layer at an edge of the via hole by selectively etching the dielectric layer to a first depth, and forming a trench by selectively etching the dielectric layer to a second depth, wherein the trench is overlapped with the via hole to form a dual damascene pattern.

What is claimed is: 
     
         1 . A method for fabricating a semiconductor device using a dual damascene process, the method comprising:
 forming a dielectric layer over a conductive layer;   forming a via hole exposing the conducting layer by selectively etching the dielectric layer;   projecting a portion of the dielectric layer at an edge of the via hole by selectively etching the dielectric layer to a first depth; and   forming a trench by selectively etching the dielectric layer to a second depth to form a dual damascene pattern, wherein the selective etching includes etching the projecting portion and an area of the dielectric layer under the projecting portion.   
     
     
         2 . The method of  claim 1 , wherein the projecting of the portion of the dielectric layer at the edge of the via hole comprises:
 forming a second photoresist pattern covering the projecting portion at the edge of the via hole and the via hole; and   etching the dielectric layer to the first depth using the second photoresist pattern as an etch mask.   
     
     
         3 . The method of  claim 2 , wherein the forming of the trench comprises:
 forming an anti-reflection layer on a whole surface of a resultant structure including the via hole;   forming a photoresist pattern for forming the trench on the anti-reflection layer and defining the second width; and   etching the dielectric layer to the second depth using the photoresist pattern as an etch mask.