US2012072649A1PendingUtilityA1

Nonvolatile memory system, and data read/write method for nonvolatile memory system

39
Assignee: KUDO YASUOPriority: Jul 31, 2006Filed: Sep 19, 2011Published: Mar 22, 2012
Est. expiryJul 31, 2026(~0.1 yrs left)· nominal 20-yr term from priority
Inventors:Yasuo KudoHiroshi SukegawaKazuya Kawamoto
G11C 16/26G11C 16/08G11C 16/10G11C 7/1027
39
PatentIndex Score
0
Cited by
0
References
0
Claims

Abstract

A nonvolatile memory system comprises a nonvolatile memory having a plurality of data areas; and a memory controller operative to control read and write operations to the nonvolatile memory. The memory controller successively executes read/write operations to plural sectors within a selected data area in the nonvolatile memory in accordance with a command and a sector count and sector address fed from a host device.

Claims

exact text as granted — not AI-modified
1 . A method for controlling a nonvolatile memory, the method comprising:
 inputting a first command to the nonvolatile memory with command latch enable signal (CLE) asserted;   after inputting the first command, inputting a data transfer amount to the nonvolatile memory with address latch enable (ALE) signal asserted;   after inputting the data transfer amount, inputting a second command to the nonvolatile memory with command latch enable signal (CLE) asserted.   
     
     
         2 . The method according to  claim 1 , wherein
 the first command and the second command instruct the nonvolatile memory to execute data read operation from a memory cell array thereof.   
     
     
         3 . The method according to  claim 2 , further comprising:
 inputting a data transfer address to the nonvolatile memory with address latch enable (ALE) signal asserted.   
     
     
         4 . The method according to  claim 3 , further comprising:
 after inputting the second command, outputting data specified by the data transfer amount and the data transfer address from the nonvolatile memory.   
     
     
         5 . The method according to  claim 4 , further comprising:
 after outputting the data, inputting the first command to the nonvolatile memory;   after inputting the first command, inputting dummy address to the nonvolatile memory;   after inputting the dummy address, inputting the second command to the nonvolatile memory; and   after inputting the second command, outputting next data being continuous to the data from the nonvolatile memory.   
     
     
         6 . The method according to  claim 4 , further comprising:
 after outputting the data, inputting a continuation command to the nonvolatile memory; and   after inputting the continuation command, outputting next data being continuous to the data from the nonvolatile memory.   
     
     
         7 . The method according to  claim 4 , further comprising:
 after outputting the data, outputting next data being continuous to the data without inputting a command.   
     
     
         8 . The method according to  claim 2 , further comprising:
 inputting a status read command to the nonvolatile memory; and   outputting status indicating whether the nonvolatile memory is executing the data read operation aside from Ready/Busy (R/B) signal.   
     
     
         9 . The method according to  claim 8 , wherein
 the status read command is <70h>.   
     
     
         10 . The method according to  claim 2 , wherein
 the nonvolatile memory is a NAND type flash memory.   
     
     
         11 . The method according to  claim 1 , wherein
 the first command and the second command instruct the nonvolatile memory to execute data write operation to a memory cell array thereof.   
     
     
         12 . The method according to  claim 11 , further comprising:
 inputting a data transfer address to the nonvolatile memory with address latch enable (ALE) signal asserted.   
     
     
         13 . The method according to  claim 12 , further comprising:
 before inputting the second command, inputting data specified by the data transfer amount and the data transfer address to the nonvolatile memory.   
     
     
         14 . The method according to  claim 13 , further comprising:
 after inputting the second command and Ready/Busy (R/B) signal is negated, inputting the first command to the nonvolatile memory;   after inputting the first command, inputting a dummy address to the nonvolatile memory;   after inputting the dummy address, inputting next data being continuous to the data to the nonvolatile memory; and   after inputting the next data, inputting the second command to the nonvolatile memory.   
     
     
         15 . The method according to  claim 13 , further comprising:
 after inputting the second command and Ready/Busy (R/B) signal is negated, inputting the first command to the nonvolatile memory;   after inputting the first command, inputting next data being continuous to the data without inputting a dummy address; and   after inputting the next data, inputting the second command to the nonvolatile memory.   
     
     
         16 . The method according to  claim 11 , further comprising:
 inputting a status read command; and   outputting status indicating whether the nonvolatile memory is executing the data write operation aside from Ready/Busy (R/B) signal.   
     
     
         17 . The method according to  claim 16 , wherein
 the status read command is <70h>.   
     
     
         18 . The method according to  claim 11 , wherein
 the nonvolatile memory is a NAND type flash memory.

Cited by (0)

No later patents cite this yet.

References (0)

No backward citations on record.