Oscillating circuit

Abstract

An oscillating circuit includes N nodes outputting oscillating signals, a main loop circuit including N inverting circuits, and a plurality of auxiliary loop circuits. Each inverting circuit in the auxiliary loop circuits is connected in parallel with even numbers of inverting circuits cascaded in the main loop circuit. The circuits for feeding back signals from outputs to inputs of the respective inverters of the main loop circuit have circuit configurations equivalent to each other. Each inverting circuit in the main loop circuit and the auxiliary loop circuits drives an output line such that a phase of an output signal is inverted with respect to a phase of an input signal and has driving power that becomes lower when the phases of the output signal and the input signal are inverted with respect to each other than when the output signal and the input signal are in phase with each other.

1 . An oscillating circuit comprising:
 a main loop circuit including main loop inverters cascaded in a form of a ring via N nodes, “N” being an even number of four or more;   N/2 auxiliary loop circuits each including an even number of auxiliary loop inverters cascaded in a form of a ring, an auxiliary loop of the N/2 auxiliary loop circuits being connected to two of the N nodes,   wherein a current flowing from a common node to a reference potential changes according to a control signal, a power supply input terminal for each of the main and auxiliary loop inverters being commonly connected to said common node.   
     
     
         2 . The oscillating circuit as claimed in  claim 1 ,
 wherein another auxiliary loop of the N/2 auxiliary loop circuits is connected to another two of the N nodes.   
     
     
         3 . The oscillating circuit as claimed in  claim 1 ,
 wherein said main and auxiliary loop inverters each include a first conduction type transistor connected in series with a second conduction type transistor, one terminal of said second conduction type transistor being connected to said common node.   
     
     
         4 . The oscillating circuit as claimed in claim
 wherein said N nodes are configured to output oscillating signals having respective different phases.   
     
     
         5 . The oscillating circuit as claimed in  claim 1 ,
 wherein an inverter of the auxiliary loop inverters is connected in parallel with even numbers of the main loop inverters.   
     
     
         6 . The oscillating circuit as claimed in  claim 1 ,
 wherein inputs for one of the main loop inverters and one of the auxiliary loop inverters are connected to one of the N nodes.   
     
     
         7 . The oscillating circuit as claimed in  claim 6 ,
 wherein outputs for another of the main loop inverters and another of the auxiliary loop inverters are connected to said one of the N nodes.   
     
     
         8 . The oscillating circuit as claimed in  claim 6 ,
 wherein outputs for another of the main loop inverters and another of the auxiliary loop inverters are connected to another of the N nodes.   
     
     
         9 . The oscillating circuit as claimed in  claim 1 ,
 wherein said reference potential is VSS.