Esd device and method

Abstract

A semiconductor component and a method for manufacturing the semiconductor component, wherein the semiconductor component includes a transient voltage suppression structure that includes at least two diodes and a Zener diode. In accordance with embodiments, a semiconductor material is provided that includes an epitaxial layer. The at least two diodes and the Zener diode are created at the surface of the epitaxial layer, where the at least two diodes may be adjacent to the Zener diode.

1 . A semiconductor component, comprising:
 a semiconductor material having first and second surfaces;   a first doped region of a first conductivity type extending from a first portion the first surface into a first portion of the semiconductor material;   a second doped region of a second conductivity type extending from a second portion of the first surface into a second portion of the semiconductor material; and   a plurality of electrical conductors arranged in a radial array on the first surface, wherein each electrical conductor has first and second ends, the first end of each electrical conductor of the plurality of electrical conductors proximal to the first doped region and the second end of each electrical conductor of the plurality of electrical conductors distal from the first doped region, the plurality of conductors including at least first, second, an third electrical conductors, wherein the second electrical conductor is between the first and third electrical conductors, and wherein a distance between the first ends of the first and second electrical distance is substantially the same as a distance between the first ends of the second and third electrical conductors.   
     
     
         2 . The semiconductor component of  claim 1 , further including an electrically conductive material in contact with the second surface. 
     
     
         3 . The semiconductor component of  claim 1 , wherein the plurality of electrical conductors arranged in the radial array is arranged an array pattern of a quarter circle. 
     
     
         4 . The semiconductor component of  claim 1 , wherein the plurality of electrical conductors arranged in the radial array is arranged in an array pattern of an ellipse. 
     
     
         5 . The semiconductor component of  claim 1 , wherein the plurality of electrical conductors arranged in the radial array is arranged in an array pattern of a circle. 
     
     
         6 . The semiconductor component of  claim 1 , wherein the plurality of electrical conductors arranged in the radial array is arranged in an array pattern of a rectangle. 
     
     
         7 . A method for manufacturing a semiconductor component, comprising:
 providing a semiconductor substrate having first and second doped region, the first doped region of a first conductivity type and the second doped region of a second conductivity type; and   forming at least first, second, and third electrically conductive structures in a radial array, wherein the first, second, and third electrically conductive structures each have first and second ends, the first end proximal to the first doped region and the second end distal from the first doped region and over portions of the second doped region, and wherein a center-to-center distance between the second ends of the first and second electrically conductive structures is substantially the same as a center-to-center distance between the second ends of the second and third electrically conductive structures.   
     
     
         8 . The method of  claim 1 , wherein forming the at least first, second, and third electrical conductors in the radial array includes forming the conductors in an array pattern selected from the group of array patterns comprising circular, elliptical, and rectangular. 
     
     
         9 . A method for manufacturing a semiconductor component, comprising
 providing a semiconductor material of a first conductivity type and having first and second surfaces;   forming a first isolation structure in a first portion of the semiconductor material, the first isolation structure extending from the first surface into the semiconductor material;   forming a second isolation structure in a second portion of the semiconductor material, the second isolation structure extending from the first surface into the semiconductor material;   forming a third isolation structure in a third portion of the semiconductor material, the third isolation structure extending from the first surface into the semiconductor material;   forming a first diode from the first portion of the semiconductor material;   forming a second diode from the second portion of the semiconductor material; and   forming a Zener diode from the third portion of the semiconductor material.   
     
     
         10 . The method of  claim 9 , wherein forming the first isolation structure comprises:
 forming a first doped region of a second conductivity type in the semiconductor material;   forming an epitaxial layer of the second conductivity type over the first surface of the semiconductor material, the epitaxial layer having a surface; and   forming second and third doped regions of the first conductivity type in the epitaxial layer, the second and third doped regions laterally spaced apart from each other, the second and third doped regions extending from the surface of the epitaxial layer to the first doped region.   
     
     
         11 . The method of  claim 10 , wherein forming the first diode includes forming a fourth doped region of the first conductivity type between the second and third doped regions, the fourth doped region extending from the surface of the epitaxial layer into the epitaxial layer. 
     
     
         12 . The method of  claim 11 , wherein forming the second isolation structure comprises forming fifth and sixth doped regions of the first conductivity type in the epitaxial layer, wherein the fifth and sixth doped regions are laterally spaced apart from each other, the fifth and sixth doped regions extending from the surface of the epitaxial layer into the epitaxial layer. 
     
     
         13 . The method of  claim 12 , wherein forming the second isolation structure further includes forming seventh and eighth doped regions of the first conductivity type in the semiconductor material. 
     
     
         14 . The method of  claim 13 , further including diffusing the fifth and seventh doped regions towards each other and diffusing the sixth and eighth dopant regions towards each other. 
     
     
         15 . The method of  claim 14 , wherein diffusing the fifth and seventh doped regions towards each other including merging portions of the fifth and seventh doped regions, and wherein diffusing the sixth and eighth doped regions towards each other includes merging portions of the sixth and eighth doped regions. 
     
     
         16 . The method of  claim 15 , further including forming a ninth doped region of the second conductivity type extending from the surface of the epitaxial layer into a portion of the epitaxial layer that is between the fifth and sixth doped regions. 
     
     
         17 . The method of  claim 16 , wherein forming the Zener diode includes forming a tenth doped region in the semiconductor material and forming an eleventh doped region in the epitaxial layer, the eleventh doped region extending from the surface of the epitaxial layer into the epitaxial layer. 
     
     
         18 . The method of  claim 17 , further including forming a twelfth doped region of the second conductivity type in the epitaxial layer, the twelfth doped region extending from the surface of the epitaxial layer into the epitaxial layer. 
     
     
         19 . The method of  claim 10 , wherein providing the semiconductor material includes:
 providing a semiconductor substrate of the first conductivity type; and   forming a first epitaxial layer of the first conductivity type on the semiconductor substrate.   
     
     
         20 . The method of  claim 19 , wherein forming the first isolation structure comprises:
 forming a first doped region of a second conductivity type in the first epitaxial layer;   forming second epitaxial layer of the second conductivity type over the first epitaxial layer, the first epitaxial layer having a surface; and   forming second and third doped regions of the first conductivity type in the second epitaxial layer, the second and third doped regions laterally spaced apart from each other and extending from the surface of the epitaxial layer to the first doped region.   
     
     
         21 . The method of  claim 20 , wherein forming the first diode includes forming a fourth doped region of the first conductivity type between the second and third doped regions, the fourth doped region extending from the surface of the epitaxial layer into the epitaxial layer. 
     
     
         22 . The method of  claim 21 , wherein forming the second isolation structure comprises:
 forming fifth and sixth doped regions of the first conductivity type in the epitaxial layer, wherein the fifth and sixth doped regions are laterally spaced apart from each other and extend from the surface of the epitaxial layer into the epitaxial layer;   forming the second isolation structure further includes forming seventh and eighth doped regions of the first conductivity type in the semiconductor material; and   diffusing the fifth and seventh doped regions towards each other and diffusing the sixth and eighth dopant regions towards each other.   
     
     
         23 . The method of  claim 22 , wherein diffusing the fifth and seventh doped regions towards each other including merging portions of the fifth and seventh doped regions, and wherein diffusing the sixth and eighth doped regions towards each other includes merging portions of the sixth and eighth doped regions. 
     
     
         24 . The method of  claim 23 , further including forming a ninth doped region of the second conductivity type extending from the surface of the epitaxial layer into a portion of the epitaxial layer that is between the fifth and sixth doped regions. 
     
     
         25 . The method of  claim 24 , wherein forming the Zener diode includes forming a tenth doped region in the semiconductor material and forming an eleventh doped region in the epitaxial layer, the eleventh doped region extending from the surface of the epitaxial layer into the epitaxial layer. 
     
     
         26 . The method of  claim 9 , wherein providing the semiconductor material includes:
 providing a semiconductor substrate of the first conductivity type, the semiconductor substrate having the first surface; and   forming a doped layer of the first conductivity type in the semiconductor substrate, the doped layer extending from the first surface into the semiconductor substrate.   
     
     
         27 . The method of  claim 26 , wherein forming the first isolation structure comprises:
 forming a first doped region of a second conductivity type in the doped layer;   forming a first epitaxial layer of the second conductivity type over the doped layer, the first epitaxial layer having a surface;   forming a second epitaxial layer over the first epitaxial layer, the second epitaxial layer having a surface; and   forming second and third doped regions of the first conductivity type in the second epitaxial layer, the second and third doped regions laterally spaced apart from each other and extending from the surface of the second epitaxial layer to the first doped region.   
     
     
         28 . The method of  claim 27 , wherein forming the first diode includes forming a fourth doped region of the first conductivity type between the second and third doped regions, the fourth doped region extending from the surface of the second epitaxial layer into the second epitaxial layer. 
     
     
         29 . The method of  claim 28 , wherein forming the second isolation structure comprises:
 forming fifth and sixth doped regions of the first conductivity type in the doped layer, wherein the fifth and sixth doped regions are laterally spaced apart from each other and extend from the first surface of the semiconductor substrate into the doped layer;   forming seventh and eighth doped regions of the first conductivity type in the second epitaxial layer; and   diffusing the fifth and seventh doped regions towards each other and diffusing the sixth and eighth dopant regions towards each other.   
     
     
         30 . The method of  claim 29 , wherein diffusing the fifth and seventh doped regions towards each other including merging portions of the fifth and seventh doped regions, and wherein diffusing the sixth and eighth doped regions towards each other includes merging portions of the sixth and eighth doped regions. 
     
     
         31 . The method of  claim 30 , further including forming a ninth doped region of the second conductivity type extending from the surface of the second epitaxial layer into a portion of the second epitaxial layer that is between the fifth and sixth doped regions. 
     
     
         32 . The method of  claim 31 , wherein forming the Zener diode includes forming a tenth doped region in the semiconductor material and forming an eleventh doped region in the second epitaxial layer, the eleventh doped region extending from the surface of the second epitaxial layer into the second epitaxial layer. 
     
     
         33 . A method for manufacturing a semiconductor component, comprising:
 providing a semiconductor material of a first conductivity type and having a surface;   forming a first doped region of the first conductivity type, a second doped region of a second conductivity type, and a third doped region of the first conductivity type in the semiconductor material, the second doped region between and laterally spaced apart from the first and the third doped regions;   forming an epitaxial layer on the semiconductor material; and   forming a fourth doped region of the first conductivity type, a fifth doped region of a second conductivity type, and a sixth doped region of the first conductivity type in the epitaxial layer, the fourth doped region between and laterally spaced apart from the fourth and the sixth doped regions.   
     
     
         34 . The method of  claim 33 , further including:
 forming a seventh doped region of the first conductivity type in the fourth doped region;   forming an eighth doped region of the second conductivity type in the fifth doped region; and   forming a ninth doped region of the first conductivity type in the sixth doped region.   
     
     
         35 . The method of  claim 34 , further including:
 forming a first electrical contact to the seventh doped region;   forming a second electrical contact to the eighth doped region; and   forming a third electrical contact to the ninth doped region.   
     
     
         36 . A semiconductor component comprising:
 a semiconductor material of a first conductivity type and having first and second surfaces;   a first isolation structure in a first portion of the semiconductor material, the first isolation structure extending from the first surface into the semiconductor material;   a second isolation structure in a second portion of the semiconductor material, the second isolation structure extending from the first surface into the semiconductor material;   a third isolation structure in a third portion of the semiconductor material, the third isolation structure extending from the first surface into the semiconductor material;   a first diode from the first portion of the semiconductor material;   a second diode from the second portion of the semiconductor material; and   a Zener diode from the third portion of the semiconductor material.