Semiconductor device and method for forming the same

Abstract

A semiconductor device and a method for forming the same are disclosed. The semiconductor device includes a semiconductor substrate including an active region defined by a device isolation film, a bit line contact plug that is coupled to the active region and that includes a first ion implantation region buried in a first inner void, and a storage node contact plug that is coupled to the active region and includes a second ion implantation region buried in a second inner void. Although the semiconductor device is highly integrated, a contact plug is buried to prevent formation of a void, so that increase in contact plug resistance is prevented, resulting in improved semiconductor device characteristics.

1 . A semiconductor device comprising:
 a semiconductor substrate including an active region defined by a device isolation film;   a contact plug that is coupled to the active region; and   an ion implantation region provided within an inner void,   wherein the inner void is provided in the contact plug.   
     
     
         2 . The semiconductor device according to  claim 1 , wherein the contact plug includes a bit line contact plug, a storage node contact plug or a combination thereof, wherein the ion implantation region includes dopants provided within silicon material. 
     
     
         3 . The semiconductor device according to  claim 1 , wherein the void includes a slit-shaped void, a circular-shaped void or a combination thereof. 
     
     
         4 . The semiconductor device according to  claim 1 , wherein the ion implantation region is formed by implanting silicon (Si+) ions and phosphorous (P+) ions. 
     
     
         5 . The semiconductor device according to  claim 1 , the device further comprising:
 a buried gate electrode layer formed in the device isolation film and the active region.   
     
     
         6 . The semiconductor device according to  claim 1 , the device further comprising:
 a bit line formed over a bit line contact plug and coupled to the bit line contact plug.   
     
     
         7 . The semiconductor device according to  claim 6 , the device further comprising:
 a bit line spacer formed at sidewalls of the bit line contact plug and the bit line.   
     
     
         8 . A method for forming a semiconductor device comprising:
 providing a semiconductor substrate including an active region defined by a device isolation film;   forming a contact plug that is coupled to the active region, the contact plug including a void therewithin; and   providing ions into the void to form an ion implantation region, the ions including silicon material and dopants.   
     
     
         9 . The method according to  claim 8 , wherein the ions are provided within the void using an ion implantation step, the ion implantation step includes:
 implanting silicon (Si+) ions and phosphorous (P+) ions through the contact plug and into the void.   
     
     
         10 . The method according to  claim 8 , wherein the forming of the contact plug includes:
 forming a bit line contact plug; and   forming a storage node contact plug.   
     
     
         11 . The method according to  claim 9 , the method further comprising:
 forming a gate electrode layer buried in the device isolation film and the active region.   
     
     
         12 . The method according to  claim 10 , wherein the forming of the bit line contact plug includes:
 forming a first interlayer insulation film over the semiconductor substrate;   forming a bit line contact hole by etching the first interlayer insulation film to expose the active region; and   forming a first conductive layer in the bit line contact hole.   
     
     
         13 . The method according to  claim 12 , wherein forming the conductive layer in the bit line contact hole includes:
 forming a first void in the first conductive layer.   
     
     
         14 . The method according to  claim 10 , the method further comprising:
 forming a bit line over the bit line contact plug in such a manner that the bit line is coupled to the bit line contact plug.   
     
     
         15 . The method according to  claim 12 , wherein the forming of the storage node contact plug includes:
 forming a second interlayer insulation film over a first interlayer insulation film;   forming a storage node contact hole by etching a second interlayer insulation film and the first interlayer insulation film to expose the active region; and   forming a second conductive layer in the storage node contact hole.   
     
     
         16 . The method according to  claim 15 , wherein forming the second conductive layer in the storage node contact hole includes:
 forming a second void in the second conductive layer.