Gate driver and liquid crystal display including same

Abstract

Provided are a gate-lines driver circuit and a liquid crystal display (LCD) device including the same. The gate-lines driver may be in danger of being subjected to static electricity and it includes: a wiring unit which receives signals from an external source and a circuit unit which outputs driving signals in response to a plurality of control signals received from the wiring unit. The circuit unit includes a plurality of shift registers, each having shift register wirings, wherein the wiring unit includes first through n-th vertical signal lines arranged sequentially in order of distance from the shift registers, with the first vertical signal line being located farthest from the shift registers. The first vertical signal line is connected to each of the shift registers by a first horizontal connection line, and the first horizontal connection line includes a first contact portion which is formed over and contacting with the first signal line and a second contact portion which is located between the n-th vertical signal line and a boundary of the shift registers and is connected to each of the shift registers by a shift register wiring. The first horizontal connection line is structured to reduce a danger that the shift registers will be burned out by a surge of static electricity current received through the wiring unit.

1 . A gate-lines driver circuit comprising:
 a wiring unit which is structured and laid out on a substrate to receive signals from one or more external sources; and   a circuit unit which is laid out on the substrate adjacent to the wiring unit and which is structured to output driving signals to corresponding gate lines of the display device in response to control signals received from the one or more external sources and by way of the wiring unit, where the circuit unit comprises a plurality of shift registers each having respective shift register wirings,   wherein the wiring unit comprises first through n-th signal lines spaced apart from one another and arranged sequentially to thus define an ordering of distance from the shift registers of the adjacent circuit unit, with the first vertical signal line being located farthest from the shift registers and the nth being closest, where n is a natural number greater than two, wherein the first signal line is connected to each of the shift registers by a first connection line, where the first connection line includes a first contact portion which is formed above and connecting to on the first signal line and where the first  1  connection line includes a second contact portion which is located between the n-th signal line and the shift registers and which connects thereat to respective shift register wirings of one or more of the shift registers of the adjacent circuit unit.   
     
     
         2 . The gate-lines driver circuit of  claim 1  and further comprising:
 a first insulating film formed on the first through n-th signal lines, where the shift register wiring is formed on the first insulating film; and 
 a second insulating film disposed on the first insulating film, where the first connection line is formed on the second insulating film. 
 
     
     
         3 . The gate-lines driver circuit of  claim 1 , wherein the first connection line is made of indium tin oxide (ITO) or indium zinc oxide (IZO). 
     
     
         4 . The gate-lines driver circuit of  claim 1 , wherein the first signal line is a direct current (DC) voltage conveying signal line which is connected to receive a DC reference voltage signal from an external source. 
     
     
         5 . The gate-lines driver circuit of  claim 1 , wherein the shift register wiring to which the first connection line connects is a contiguous extension of a transistor gate line or a transistor source or drain line of at least one of the shift registers of the adjacent circuit unit. 
     
     
         6 . The gate-lines driver circuit of  claim 1 , wherein at least one of the second through n-th signal lines is connected to a corresponding one or more of the shift registers by a respective at least one of second through n-th  1  connection lines, where the at least one non-first horizontal connection line has a respective first contact portion which contacts the corresponding non-first signal line and a second contact portion which is located between the n-th signal line and the corresponding one or more shift registers and which connects thereat to corresponding shift register wiring of the corresponding one or more shift registers. 
     
     
         7 . The gate-lines driver circuit of  claim 1 , wherein the first through n-th vertical signal lines comprise a DC voltage signal line which receives a DC voltage from an external source, a scan start signal line which receives a start signal for starting an operation of the circuit unit, a clock signal line which receives a clock signal, a clock bar signal which receives a clock bar signal, and an initialization signal line which receives an initialization signal. 
     
     
         8 . A driver circuit comprising:
 a wiring unit which is structured to receive and convey signals provided from an external source; and   a circuit unit which is structured to output a sequence of driving signals in response to plural control signals received from and conveyed to the circuit unit by the wiring unit, where the circuit unit is disposed on a substrate adjacent to the wiring unit and the circuit unit comprises a plurality of shift registers, each having respective shift register wirings,   wherein the wiring unit comprises first through n-th signal lines spaced apart from one another and arranged sequentially to thereby define an ordering of distance from the shift registers of the adjacent circuit unit, with the first signal line being located farthest from the shift registers, where n is a natural number,   wherein the first signal line is connected to each of the shift registers by a shift register wiring extending to the first signal line,   wherein at least one of the second through n-th signal lines is divided into two spaced apart sections between which part of the shift register wiring is insulatively disposed, and the two sections which are separated from each other are electrically connected by a bridging connection line having contact portions and extending insulatively over the shift register wiring.   
     
     
         9 . The driver circuit of  claim 8  and further comprising:
 a first insulating film is formed on the second through n-th signal lines, where the shift register wiring is formed on the first insulating film; and 
 a second insulating film disposed on the first insulating film, where the connection line is formed on the second insulating film. 
 
     
     
         10 . The driver circuit of  claim 8 , wherein the contact portions are respectively formed on respective ends of the two sections which are close to the shift register wiring. 
     
     
         11 . The driver circuit of  claim 8 , wherein the connection line is made of ITO or IZO. 
     
     
         12 . The driver circuit of  claim 8 , wherein the shift register wiring is an extension of a transistor gate line or of a transistor source or drain line provided in at least one of each of the shift registers. 
     
     
         13 . The driver circuit of  claim 8 , wherein the first signal line is a DC voltage signal line which receives a DC voltage signal from an external source. 
     
     
         14 . The driver circuit of  claim 8 , wherein each of the second signal line and the third signal line is divided into two sections which are separated from each other and extend in directions so as to have centered there between the shift register wiring wherein the second signal line is a scan start signal line which receives a start signal for starting an operation of the circuit unit, and the third signal line is an initialization signal line which receives an initialization signal. 
     
     
         15 . The driver circuit of  claim 8 , wherein the first through n-th signal lines comprise a DC voltage signal line which receives a DC voltage from an external source, a scan start signal line which receives a start signal for starting the operation of the circuit unit, a clock signal line which receives a clock signal, a clock bar signal which receives a clock bar signal, and an initialization signal line which receives an initialization signal. 
     
     
         16 . A liquid crystal display (LCD) device comprising a gate-lines driver circuit formed on a substrate, wherein the gate-lines driver circuit comprises:
 a wiring unit which is disposed on the substrate and is structured to receive signals from an external source; and   a circuit unit which is disposed on the substrate, adjacent to the wiring unit and is structured to output driving signals in response to a plurality of control signals received from the wiring unit and where the circuit unit comprises a plurality of shift registers, each having shift register wirings,   wherein the wiring unit comprises first through n-th signal lines arranged sequentially in an order of distance from the shift registers, with the first signal line being located farthest from the shift registers, where n is a natural number, wherein the first signal line is connected to each of the shift registers by a first connection line, and the first connection line comprises a first contact portion which is formed to contact the first signal line and a second contact portion which is located between the n-th signal line and each of the shift registers and is connected to each of the shift registers by a shift register wiring.   
     
     
         17 . The LCD device of  claim 16 , wherein the substrate is divided into a display region in which an image is displayed and a non-display region in which the image is not displayed, wherein the gate driver is formed in the non-display region. 
     
     
         18 . The LCD device of  claim 16  and further comprising:
 a first insulating film is formed on the first through n-th signal lines, where the shift register wiring is formed on the first insulating film, and 
 a second insulating film which disposed on the first insulating film, where the first connection line is formed on the second insulating film. 
 
     
     
         19 . The LCD device of  claim 16 , wherein the shift register wiring is formed of an extension of at least one a transistor gate line or a transistor source or drain line of one of the shift registers. 
     
     
         20 . An LCD device comprising a gate-lines driver circuit formed on a substrate, wherein the gate-lines driver circuit comprises:
 a wiring unit which is structured to receive signals from an external source; and   a circuit unit which is structured to output driving signals in response to a plurality of control signals received from the wiring unit and comprises a plurality of shift registers, each having shift register wirings,   wherein the wiring unit comprises first through n-th signal lines arranged sequentially in order of distance from the shift registers, with the first signal line being located farthest from the shift registers, where n is a natural number, wherein the first signal line is connected to each of the shift registers by a shift register wiring extending to the first signal line, at least one of the second through n-th signal lines is divided into two spaced apart sections having centered there between the shift register wiring, and the two spaced apart sections which are electrically connected by a bridging connection line having contact portions.