Semiconductor device

Abstract

A semiconductor device and a method of forming the same are disclosed, which forms a low-dielectric-constant oxide film only at a peripheral part of a bit line conductive material, resulting in reduction in parasitic capacitance of the bit line. The semiconductor device includes a bit line formed over a semiconductor substrate, a first spacer formed over sidewalls of the bit line, and a second spacer formed over sidewalls of the first spacer, configured to have a dielectric constant lower than that of the first spacer.

1 . A semiconductor device comprising:
 a bit line disposed over a semiconductor substrate;   a first spacer disposed over sidewalls of the bit line; and   a second spacer disposed over the first spacer and configured to have a dielectric constant lower than that of the first spacer.   
     
     
         2 . The semiconductor device according to  claim 1 , wherein the bit line includes a bit line conductive material and a hard mask layer. 
     
     
         3 . The semiconductor device according to  claim 1 , wherein the first spacer includes a nitride film. 
     
     
         4 . The semiconductor device according to  claim 1 , wherein the second spacer includes an oxide film. 
     
     
         5 . The semiconductor device according to  claim 1 , wherein the second spacer is disposed over an entire surface of the first spacer. 
     
     
         6 . The semiconductor device according to  claim 1 , wherein the second spacer is disposed over a portion of the first spacer. 
     
     
         7 . The semiconductor device according to  claim 2 , wherein the second spacer is disposed over a portion of the first spacer such that the second spacer is disposed under a bottom sidewall of the bit line conductive material. 
     
     
         8 . The semiconductor device according to  claim 1 , the device further comprising:
 a third spacer disposed over the first spacer and the second spacer.   
     
     
         9 . A semiconductor device comprising:
 a bit line disposed over a semiconductor substrate;   a first spacer disposed over sidewalls of the bit line;   a second spacer disposed over the first spacer and configured to have a dielectric constant lower than that of the first spacer; and   a third spacer disposed over the first spacer and the second spacer.   
     
     
         10 . The semiconductor device according to  claim 9 , wherein the bit line includes a bit line conductive material and a hard mask layer. 
     
     
         11 . The semiconductor device according to  claim 9 , wherein the first spacer includes a nitride film. 
     
     
         12 . The semiconductor device according to  claim 9 , wherein the second spacer includes an oxide film. 
     
     
         13 . The semiconductor device according to  claim 9 , wherein the second spacer is disposed over an entire surface of the first spacer. 
     
     
         14 . The semiconductor device according to  claim 9 , wherein the second spacer is disposed over a portion of the first spacer. 
     
     
         15 . The semiconductor device according to  claim 10 , wherein the second spacer is formed over a portion of the first spacer formed such that the second spacer is disposed over the bit line conductive material. 
     
     
         16 - 19 . (canceled)