Non-volatile memory device and method of fabricating the same
Abstract
Provided are a non-volatile memory device which can be extended in a stack structure and thus can be highly integrated, and a method of manufacturing the non-volatile memory device. The non-volatile memory device includes: at least one first electrode, at least one second electrode crossing the at least one first electrode, at least one data storing layer interposed between the at least one first electrode and the second electrode, at a region in which the at least one first electrode crosses the at least one second electrode and at least one metal silicide layer interposed between the at least one first electrode and the at least one second electrode, at the region in which the at least one first electrode crosses the at least one second electrode.
Claims
exact text as granted — not AI-modified1 . A non-volatile memory comprising:
at least one first electrode; at least one second electrode crossing the at least one first electrode; and at least one data storing layer disposed at a cross point of the at least one first electrode and the at least one second electrode, wherein the at least one first electrode comprises a first semiconductor having a first conductivity, and the at least one second electrode comprises a third semiconductor having a second conductivity, which is opposite to the first conductivity, and a buried layer buried in the third semiconductor, wherein the buried layer comprises one of a metal or metal silicide.
2 . The non-volatile memory device of claim 1 , wherein at least one metal silicide layer is interposed between the at least one first electrode and the at least one data storing layer.
3 . The non-volatile memory device of claim 2 , wherein the first semiconductor contacts the at least one metal silicide layer so as to form a schottky diode.
4 . The non-volatile memory device of claim 2 , further comprising at least one junction layer interposed between the at least one first electrode and the at least one metal silicide layer, and the at least one junction layer comprises a second semiconductor having a second conductivity which is opposite to the first conductivity.
5 . The non-volatile memory device of claim 4 , wherein the at least one junction layer is recessed in a sidewall of the at least one first electrode.
6 . The non-volatile memory device of claim 4 , wherein the at least one metal silicide layer is interposed between the at least one junction layer and the at least one second electrode.
7 . The non-volatile memory device of claim 6 , wherein the at least one data storing layer is interposed between the at least one junction layer and the at least one metal silicide layer.
8 . The non-volatile memory device of claim 6 , wherein the at least one data storing layer is interposed between the at least one first electrode and the at least one junction layer.
9 . The non-volatile memory device of claim 1 , wherein the at least one second electrode comprises a metal.
10 . The non-volatile memory device of claim 1 , wherein the at least one first electrode and the at least one second electrode are arranged to cross each other at a right angle.
11 . The non-volatile memory device of claim 1 , wherein the data storing layer comprises a variable resistor.
12 . The non-volatile memory device of claim 1 , wherein the at least one first electrode comprises a plurality of first electrodes, and the at least one second electrode comprises a plurality of second electrodes disposed between the plurality of the first electrodes.
13 . The non-volatile memory device of claim 12 , wherein the plurality of the first electrodes are stacked as a plurality of stacked layers, and the at least one metal silicide layer comprises a plurality of metal silicide layers interposed between the plurality of the first electrodes and the plurality of the second electrodes.
14 . The non-volatile memory device of claim 13 , wherein the at least one data storing layer extending across the plurality of the first electrodes constituting a plurality of stacked layers.Join the waitlist — get patent alerts
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