Phase change memory device

Abstract

A phase change memory device includes a signal generator configured to generate first and second sensing and amplifying enable signals which are sequentially activated during an activation period of a word line selection signal and each of which has a certain activation period length, a resistance sensor configured to sense a resistance value by applying a certain operation current to a phase change memory cell corresponding to the word line selection signal during an activation period of the first sensing and amplifying enable signal and a voltage level amplifier configured to logically determine a voltage level of the resistance sensing signal based on a voltage level of a logic reference signal during an activation period of the second sensing.

1 - 5 . (canceled) 
     
     
         6 . The phase change memory device comprising:
 a signal generator configured to generate first and second sensing and amplifying enable signals which are sequentially activated during an activation period of a word line selection signal and each of which has a certain activation period length;   a resistance sensor configured to sense a resistance value by applying a certain operation current to a phase change memory cell corresponding to the word line selection signal during an activation period of the first sensing and amplifying enable signal and determine a voltage level of a resistance sensing signal corresponding to the sensed result; and   a voltage level amplifier configured to logically determine a voltage level of the resistance sensing signal based on a voltage level of a logic reference signal during an activation period of the second sensing and amplifying enable signal and output amplified resistance sensing signals by amplifying the determined voltage level of the resistance sensing signal, wherein the voltage level amplifier receives the logic reference signal through a first input terminal and receives the resistance sensing signal through a second input terminal, and   wherein the voltage level amplifier includes:
 a sensing and amplifying unit configured to differentially amplify a voltage level of the resistance sensing signal based on a voltage level difference of the logic reference signal and the resistance sensing signal during an activation period of the second sensing and amplifying enable signal and output the amplified resistance sensing signals; and 
 a voltage level latch unit configured to latch voltage levels of the amplified resistance sensing signals in response to a signal saving signal that toggles during the activation period of the second sensing and amplifying enable signal. 
   
     
     
         7 . The phase change memory device of  claim 6 , wherein the signal generator includes:
 a first sensing and amplifying enable signal generator configured to generate the first sensing and amplifying enable signal in response to a read command during the activation period of the word line selection signal; and   a second sensing and amplifying enable signal generator configured to generate the signal saving signal and the second sensing and amplifying enable signal in response to the first sensing and amplifying enable signal during the activation period of the word line selection signal.   
     
     
         8 . The phase change memory device of  claim 7 , wherein the first sensing and amplifying enable signal generator activates the first sensing and amplifying enable signal in response to read command after the word line selection signal is activated, and
 wherein the first sensing and amplifying enable signal generator inactivates the first sensing and amplifying enable signal after a first time passes after the first sensing and amplifying enable signal is activated, which is before the word line selection signal is inactivated.   
     
     
         9 . The phase change memory device of  claim 8 , wherein the second sensing and amplifying enable signal generator activates the second sensing and amplifying enable signal after a second time passes after the first sensing and amplifying enable signal is activated where the second time is shorter than the first time,
 wherein the second sensing and amplifying enable signal generator toggles the signal saving signal in response to the activation of the second sensing and amplifying enable signal, and   wherein the second sensing and amplifying enable signal generator inactivates the second sensing and amplifying enable signal when the toggling of the signal saving signal is terminated before the word line selection signal is inactivated.   
     
     
         10 - 21 . (canceled) 
     
     
         22 . The phase change memory device comprising:
 a signal generator configured to generate first and second sensing and amplifying enable signals which are sequentially activated during an activation period of a word line selection signal and each of which has a certain activation period length;   a selected cell resistance sensor configured to sense a resistance value by applying a certain selected cell sensing operation current to a phase change memory cell corresponding to the word line selection signal during an activation period of the first sensing and amplifying enable signal and decide a voltage level of a resistance sensing signal corresponding to the sensed result;   a reference cell resistance sensor configured to sense a resistance value of a reference cell by applying a certain reference cell sensing operation current to the reference cell during an activation period of the first sensing and amplifying enable signal and decide a voltage level of a logic reference signal corresponding to the sensed result; and   a voltage level amplifier configured to logically determine a voltage level of the resistance sensing signal based on a voltage level of the logic reference signal during an activation period of the second sensing and amplifying enable signal, amplify the voltage level of the resistance sensing signal, and output amplified resistance sensing signals, wherein the voltage level amplifier includes:
 a sensing and amplifying unit configured to receive the logic reference signal through a first input terminal, receive the resistance sensing signal through a second input terminal, and output the amplified resistance sensing signals by differentially amplifying a voltage level of the resistance sensing signal based on the voltage level difference during the activation period of the second sensing and amplifying enable signal; and 
 a voltage level latch unit configured to latch voltage levels of the amplified resistance sensing signals in response to a signal saving signal toggling during the activation period of the second sensing and amplifying enable signal. 
   
     
     
         23 . The phase change memory device of  claim 22 , wherein the signal generator includes:
 a first sensing and amplifying enable signal generator configured to generate the first sensing and amplifying enable signal in response to a read command during an activation period of the word line selection signal; and   a second sensing and amplifying enable signal generator configured to generate the signal saving signal and the second sensing and amplifying enable signal in response to the first sensing and amplifying enable signal during the activation period of the word line selection signal.   
     
     
         24 . The phase change memory device of  claim 23 , wherein the first sensing and amplifying enable signal generator activates the first sensing and amplifying enable signal in response to the read command after the word line selection signal is activated, and
 wherein the first sensing and amplifying enable signal generator inactivates the first sensing and amplifying enable signal after a first time passes after the first sensing and amplifying enable signal is activated, which is before the word line selection signal is inactivated.   
     
     
         25 . The phase change memory device of  claim 24 , wherein the second sensing and amplifying enable signal generator activates the second sensing and amplifying enable signal after a second time passes after the first sensing and amplifying enable signal is activated where the second time is shorter than the first time,
 wherein the second sensing and amplifying enable signal generator toggles the signal saving signal in response to the activation of the second sensing and amplifying enable signal, and   wherein the second sensing and amplifying enable signal generator inactivates the second sensing and amplifying enable signal when the toggling of the signal saving signal is terminated before the word line selection signal is inactivated.   
     
     
         26 - 35 . (canceled)