Display substrate, display panel and display device
Abstract
A display substrate includes an insulating substrate, a first gate line, a first lower electrode, a second lower electrode, a first upper electrode, and a second upper electrode. The insulating substrate includes a first pixel region and a second pixel region located at a first direction from the first pixel region. The first gate line extends in a second direction crossing the first direction on the insulating substrate. The first and the second lower electrodes are in the first and the second pixel regions, respectively. The first upper electrode overlaps the first lower electrode in the first pixel region and includes a first slit pattern extending in a third direction different from the first and the second directions. The second upper electrode overlaps the second lower electrode in the second pixel region and includes a second slit pattern extending in a fourth direction different from the first to third directions.
Claims
exact text as granted — not AI-modified1 . A display substrate comprising:
an insulating substrate including a first pixel region and a second pixel region located in a first direction from the first pixel region; a first gate line extending in a second direction crossing the first direction on the insulating substrate; a first lower electrode in the first pixel region; a second lower electrode in the second pixel region; a first upper electrode overlapping the first lower electrode in the first pixel region and comprising a first slit pattern extending in a third direction different from the first and the second directions; and a second upper electrode overlapping the second lower electrode in the second pixel region and comprising a second slit pattern extending in a fourth direction different from the first to the third directions.
2 . The display substrate of claim 1 , further comprising:
an alignment layer on the insulating substrate on which the first and the second upper electrodes are located, wherein an alignment direction of the alignment layer in the first pixel region is same as that of the alignment layer in the second pixel region.
3 . The display substrate of claim 2 , wherein the alignment direction of the alignment layer is the first direction or the second direction.
4 . The display substrate of claim 1 , wherein the second direction is perpendicular to the first direction, and
wherein the third direction and the fourth direction are symmetric to each other with respect to the second direction.
5 . The display substrate of claim 1 , wherein the insulating substrate further comprises a third pixel region located in the second direction from the first pixel region and a fourth pixel region located in the second direction from the second pixel region, and wherein the display substrate further comprises:
a third lower electrode in the third pixel region; a fourth lower electrode in the fourth pixel region; a third upper electrode overlapping the third lower electrode in the third pixel region and comprising a third slit pattern extending in the third direction; and a fourth upper electrode overlapping the fourth lower electrode in the fourth pixel region and comprising a fourth slit pattern extending in the fourth direction.
6 . The display substrate of claim 1 , further comprising:
a second gate line in parallel with the first gate line; a first data line crossing the first and the second gate lines; a first switching element in the first pixel region and electrically coupled to the first gate line and the first data line; and a second switching element in the second pixel region and electrically coupled to the second gate line and the first data line, wherein the first lower electrode or the first upper electrode is electrically coupled to the first switching element, and wherein the second lower electrode or the second upper electrode is electrically coupled to the second switching element.
7 . The display substrate of claim 6 , wherein the first gate line is between the first and the second pixel regions, and
wherein the second pixel region is between the first and the second gate lines.
8 . The display substrate of claim 6 , wherein the first and the second pixel regions are between the first and the second gate lines.
9 . The display substrate of claim 1 , further comprising:
a second gate line in parallel with the first gate line; a first data line crossing the first and the second gate lines; a second data line in parallel with the first data line and crossing the first and the second gate lines; a first switching element in the first pixel region and electrically coupled to the first gate line and the second data line; and a second switching element in the second pixel region and electrically coupled to the second gate line and the first data line, wherein the first lower electrode or the first upper electrode is electrically coupled to the first switching element, and wherein the second lower electrode or the second upper electrode is electrically coupled to the second switching element.
10 . The display substrate of claim 9 , wherein the first gate line is between the first and the second pixel regions, and
wherein the second pixel region is between the first and the second gate lines.
11 . The display substrate of claim 9 , wherein the first and the second pixel regions are between the first and the second gate lines.
12 . The display substrate of claim 11 , wherein the first and the second upper electrodes have an integral structure where the first and the second upper electrodes are coupled to each other, and
wherein the first and the second slit patterns are coupled to each other.
13 . The display substrate of claim 11 , wherein the first and the second pixel regions are between the first and the second data lines, and
wherein the first switching element is adjacent to the second data line, and the second switching element is adjacent to the first data line
14 . The display substrate of claim 11 , wherein the insulating substrate further comprises a third pixel region located in the first direction from the second pixel region, and wherein the display substrate further comprises:
a third gate line extending in the second direction and between the third pixel region and the second gate line; a third lower electrode in the third pixel region; a third upper electrode overlapping the third lower electrode in the third pixel region and comprising a third slit pattern extending in the third direction; and a third switching element in the third pixel region and electrically coupled to the third gate line, the third switching element being adjacent to the third gate line.
15 . The display substrate of claim 1 , further comprising:
first and second data lines crossing the first gate line, the first and the second data lines disposed in parallel with each other, wherein the first and the second pixel regions are between the first and the second data lines, wherein sides of the first and the second upper electrodes adjacent to the first data line are in parallel with the first data line, and wherein sides of the first and the second upper electrodes adjacent to the second data line are in parallel with the second data line.
16 . The display substrate of claim 15 , wherein each of the first and the second data lines comprises:
a first extension portion in parallel with the first slit pattern; and a second extension portion in parallel with the second slit pattern.
17 . The display substrate of claim 15 , wherein each of the first and the second data lines has a straight line shape extending along the first direction.
18 . The display substrate of claim 1 , wherein the first slit pattern comprises a first curved portion having an inclined angle smaller than an angle between the second direction and the third direction, and the first curved portion is in at least one of both edge portions of the first slit pattern, and
wherein the second slit pattern comprises a second curved portion having an inclined angle smaller than an angle between the second direction and the fourth direction, and the second curved portion is in at least one of both edge portions of the second slit pattern.
19 . A display substrate comprising:
an insulating substrate comprising a first pixel region and a second pixel region located in a first direction from the first pixel region; a first gate line between the first and the second pixel regions, the first gate line extending in a second direction crossing the first direction on the insulating substrate; a first lower electrode in the first pixel region; a second lower electrode in the second pixel region; a first upper electrode overlapping the first lower electrode in the first pixel region and comprising a first slit pattern sequentially extending in a third direction and in a fourth direction, the third and the fourth directions being different from each other, and each of the third and the fourth directions being different from the first and the second directions; a second upper electrode overlapping the second lower electrode in the second pixel region and comprising a second slit pattern sequentially extending in the fourth direction and the third direction.
20 . The display substrate of claim 19 , further comprising:
an alignment layer on the insulating substrate on which the first and the second upper electrodes are located, wherein an alignment direction of the alignment layer in the first pixel region is same as that of the alignment layer in the second pixel region.
21 . The display substrate of claim 20 , wherein the alignment direction of the alignment layer is the first direction or the second direction.
22 . The display substrate of claim 19 , wherein the second direction is perpendicular to the first direction, and
wherein the third direction and the fourth direction are symmetric to each other with respect to the second direction.
23 . The display substrate of claim 19 , wherein the insulating substrate further comprises a third pixel region located in the second direction from the first pixel region and a fourth pixel region located in the second direction from the second pixel region, and wherein the display substrate further comprises:
a third lower electrode in the third pixel region; a fourth lower electrode in the fourth pixel region; a third upper electrode overlapping the third lower electrode in the third pixel region and comprising a third slit pattern sequentially extending in the third direction and in the fourth direction; and a fourth upper electrode overlapping the fourth lower electrode in the fourth region and comprising a fourth slit pattern sequentially extending in the fourth direction and in the third direction.
24 . The display substrate of claim 19 , further comprising:
a second gate line in parallel with the first gate line; a first data line crossing the first and the second gate lines; a second data line crossing the first and the second gate lines and in parallel with the first data line; a first switching element in the first pixel region and electrically coupled to the first gate line and the second data line; and a second switching element in the second pixel region and electrically coupled to the second gate line and the first data line, wherein the first lower electrode or the first upper electrode is electrically coupled to the first switching element, and wherein the second lower electrode or the second upper electrode is electrically coupled to the second switching element.
25 . The display substrate of claim 24 , wherein the first and the second pixel regions are between the first and the second data lines,
wherein the first switching element is adjacent to the second data line, and wherein the second switching element is adjacent to the first data line.
26 . The display substrate of claim 19 , further comprising:
first and second data lines crossing the first gate line, the first and the second data lines in parallel with each other, wherein the first and the second pixel regions are between the first and the second data lines, wherein sides of the first and the second upper electrodes adjacent to the first data line are in parallel with the first data line, and wherein sides of the first and the second upper electrodes adjacent to the second data line are in parallel with the second data line.
27 . The display substrate of claim 26 , wherein each of the first and the second data lines comprises:
a first extension portion in parallel with the first slit pattern; and a second extension portion in parallel with the second slit pattern.
28 . The display substrate of claim 19 , wherein the first slit pattern comprises at least one of a first curved portion in an edge portion of the first slit pattern or a second curved portion in the other edge portion of the first slit pattern, the first curved portion has an inclined angle smaller than an angle between the second direction and the third direction, and the second curved portion has an inclined angle smaller than an angle between the second direction and the fourth direction, and
wherein the second slit pattern comprises at least one of a third curved portion in an edge portion of the second slit pattern or a fourth curved portion in the other edge portion of the second slit pattern, the third curved portion has an inclined angle smaller than an angle between the second direction and the fourth direction, and the fourth curved portion has an inclined angle smaller than an angle between the second direction and the third direction.
29 . A display panel comprising:
a display substrate comprising:
an insulating substrate comprising a first pixel region and a second pixel region located in a first direction from the first pixel region;
a first gate line extending in a second direction crossing the first direction;
a first lower electrode and a first upper electrode in the first pixel region, the first upper electrode overlapping the first lower electrode and comprising a first slit pattern extending in a third direction different from the first and the second directions; and
a second lower electrode and a second upper electrode in the second pixel region, the second upper electrode overlapping the second lower electrode and comprising a second slit pattern extending in a fourth direction different from the first to the third directions;
an opposing substrate facing the display substrate and comprising color filters overlapping the first and the second pixel regions; and a liquid crystal layer between the display substrate and the opposing substrate.
30 . The display panel of claim 29 , wherein the display substrate further comprises:
a first alignment layer on the insulating substrate on which the first and the second upper electrodes are located, and wherein an alignment direction of the first alignment layer in the first pixel region is same as that of the first alignment layer in the second pixel region.
31 . The display panel of claim 30 , wherein the alignment direction of the first alignment layer is the first direction or the second direction.
32 . The display panel of claim 30 , wherein the opposing substrate further comprises a second alignment layer on the opposing substrate on which the color filters are formed, and
wherein the second alignment layer has a single alignment direction in regions of the opposing substrate facing the first and the second pixel regions.
33 . The display panel of claim 32 , wherein the alignment direction of the second alignments layer is same as that of the first alignment layer.
34 . The display panel of claim 33 , further comprising:
a first polarizing plate on a lower surface of the display substrate and having a polarizing axis same as the alignment direction of the first alignment layer; and a second polarizing plate on an upper surface of the opposing substrate and having a polarizing axis perpendicular to the polarizing axis of the first polarizing plate.
35 . The display panel of claim 29 , wherein the display substrate further comprises a second gate line in parallel with the first gate line,
wherein the first gate line is between the first and the second pixel regions, and wherein the second pixel region is between the first and the second gate lines.
36 . The display panel of claim 29 , wherein the display substrate further comprises a second gate line in parallel with the first gate line, and
wherein the first and the second pixel regions are between the first and the second gate lines.
37 . The display panel of claim 36 , wherein the insulating substrate further comprises a third pixel region located in the first direction from the second pixel region, and wherein the display substrate further comprises:
a third gate line extending in the second direction and between the second gate line and the third pixel region; a third lower electrode in the third pixel region; a third upper electrode overlapping the third lower electrode and comprising a third slit pattern extending in the third direction; and a third switching element electrically coupled to the third gate line and located in the third pixel region.
38 . The display panel of claim 37 , wherein the opposing substrate further comprises a light-blocking pattern overlapping the first and the second switching elements, and
wherein a width of the light-blocking pattern between the second and the third pixel regions is smaller than a distance from a distant end of the second switching element to a distant end of the third switching element.
39 . A display panel comprising:
a display substrate comprising; an insulating substrate comprising a first pixel region and a second pixel region located in a first direction from the first pixel region; a first gate line between the first and the second pixel regions, the first gate line extending in a second direction crossing the first direction; a first lower electrode and a first upper electrode in the first pixel region, the first upper electrode overlapping the first lower electrode and comprising a first slit pattern sequentially extending in a third direction and in a fourth direction, the third and the fourth directions being different from each other, and each of the third and the fourth directions being different from the first and the second directions; and a second lower electrode and a second upper electrode in the second pixel region, the second upper electrode overlapping the second lower electrode and comprising a second slit pattern sequentially extending in the fourth direction and in the third direction; an opposing substrate facing the display substrate and comprising color filters overlapping the first and the second pixel regions; and a liquid crystal layer between the display substrate and the opposing substrate.
40 . The display panel of claim 39 , wherein the display substrate further comprises:
a first alignment layer on the insulating substrate on which the first and the second upper electrodes are located, and wherein an alignment direction of the first alignment layer in the first pixel region is same as that of the first alignment layer in the second pixel region.
41 . The display panel of claim 40 , wherein the alignment direction of the first alignment layer is the first direction or the second direction.
42 . The display panel of claim 40 , wherein the opposing substrate further comprises a second alignment layer on the color filters, and
wherein the second alignment layer has a signal alignment direction in regions of the opposing substrate facing the first and the second pixel regions.
43 . The display panel of claim 42 , wherein the alignment direction of the second alignments layer is same as that of the first alignment layer.
44 . The display panel of claim 39 , further comprising:
a first polarizing plate on a lower surface of the display substrate and having a polarizing axis same as the alignment direction of the first alignment layer; and a second polarizing plate on an upper surface of the opposing substrate and having a polarizing axis perpendicular to the polarizing axis of the first polarizing plate.
45 . A display device comprising:
a display panel comprising a first pixel, a second pixel and a first gate line, the first pixel comprising a first lower electrode and a first upper electrode overlapping the first lower electrode, the first upper electrode having a first slit pattern, the second pixel located in a first direction from the first pixel, the second pixel comprising a second lower electrode and a second upper electrode overlapping the second lower electrode, the second upper electrode having a second slit pattern extending in a direction different from a longitudinal direction of the first slit pattern, and the first gate line extending in a second direction different from the first direction; a gamma voltage generator configured to generate a first gamma reference voltage group and a second gamma reference voltage group, the first and the second gamma reference voltage groups having different voltage levels; a controller configured to output first and second pixel data corresponding to the first and the second pixels; and a data driver configured to convert the first pixel data to a first pixel voltage based on the first gamma reference voltage group, to convert the second pixel data to a second pixel voltage based on the second gamma reference voltage group, and to output the first pixel voltage and the second pixel voltage to the first pixel and the second pixel, respectively.
46 . The display device of claim 45 , wherein the controller is configured to receive image data from an external image source, to generate the first and the second pixel data based on the received image data, and to output the first and the second pixel data and a gamma selecting signal for controlling a selection of the first gamma reference voltage group or the second gamma reference voltage group, and
wherein the data driver includes a gamma voltage selector that selects one of the first and the second gamma reference voltage groups in response to the gamma selecting signal.
47 . The display device of claim 45 , wherein the controller is configured to receive image data from an external image source, to generate the first and the second pixel data based on the received image data, and to output the first and the second pixel data and a gamma selecting signal for controlling a selection of the first gamma reference voltage group or the second gamma reference voltage group, and
wherein the gamma voltage generator is configured to selectively output one of the first and the second gamma reference voltage groups in response to the gamma selecting signal.
48 . The display device of claim 47 , wherein the gamma voltage generator comprises:
a first gamma unit comprising a first resistor-string, and configured to generate the first gamma reference voltage group using a power supply voltage; a second gamma unit comprising a second resistor-string, and configured to generate the second gamma reference voltage group using the power supply voltage, the second resistor-string having resistances different from those of the first resistor-string; and a gamma voltage selector configured to selectively output one of the first and the second gamma reference voltage groups in response to the gamma selecting signal.
49 . The display device of claim 45 , wherein gamma values of the first and the second gamma reference voltage groups are different from each other.
50 . The display device of claim 45 , where an extending direction of the first slit pattern is symmetrical to that of the second slit pattern with respect to the second direction.
51 . The display device of claim 45 , wherein the display panel further comprises:
a first data line extending in the first direction to cross the first gate line, and coupled to at least one of the first and the second pixels.
52 . The display device of claim 45 , wherein the first and the second pixels are sequentially operated, and
wherein a selection period of the first and the second gamma reference voltage groups is same as an operating period of the first and the second pixels.Cited by (0)
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