Semiconductor device

Abstract

A semiconductor device includes a first MIS transistor and a second MIS transistor. The first MIS transistor includes a first gate insulating film which is formed on a first active region of a semiconductor substrate and has a first high dielectric constant film, and a first gate electrode formed on the first gate insulating film. The second MIS transistor includes a second gate insulating film which is formed on a second active region of the semiconductor substrate and has a second high dielectric constant film, and a second gate electrode formed on the second gate insulating film. The second high dielectric constant film contains first adjusting metal. The first high dielectric constant film has a higher nitrogen concentration than the second high dielectric constant film, and does not contain the first adjusting metal.

1 . A semiconductor device comprising:
 a first MIS transistor and a second MIS transistor, wherein   the first MIS transistor includes a first gate insulating film which is formed on a first active region of a semiconductor substrate, and has a first high dielectric constant film, and a first gate electrode formed on the first gate insulating film,   the second MIS transistor includes a second gate insulating film which is formed on a second active region of the semiconductor substrate, and has a second high dielectric constant film, and a second gate electrode formed on the second gate insulating film,   the second high dielectric constant film contains a first adjusting metal, and   the first high dielectric constant film has a higher concentration of nitrogen than the second high dielectric constant film, and does not contain the first adjusting metal.   
     
     
         2 . The semiconductor device of  claim 1 , wherein
 the first high dielectric constant film contains nitrogen, and the second high dielectric constant film does not contain nitrogen.   
     
     
         3 . The semiconductor device of  claim 1 , wherein
 the first adjusting metal is aluminum.   
     
     
         4 . The semiconductor device of  claim 1 , wherein
 the first high dielectric constant film contains a second adjusting metal, and the second high dielectric constant film does not contain the second adjusting metal.   
     
     
         5 . The semiconductor device of  claim 4 , wherein
 the second adjusting metal is lanthanum.   
     
     
         6 . The semiconductor device of  claim 1 , wherein
 the first gate insulating film includes a first underlying film formed on the first active region, and the first high dielectric constant film formed on the first underlying film, and   the second gate insulating film includes a second underlying film formed on the second active region, and the second high dielectric constant film formed on the second underlying film.   
     
     
         7 . The semiconductor device of  claim 6 , wherein
 the first underlying film and the second underlying film are made of a silicon oxide film.   
     
     
         8 . The semiconductor device of  claim 1 , wherein
 the first high dielectric constant film and the second high dielectric constant film are made of metal oxide having a dielectric constant of 10 or higher.   
     
     
         9 . The semiconductor device of  claim 1 , wherein
 the first gate electrode includes a first metal film formed on the first gate insulating film, and a first silicon film formed on the first metal film, and   the second gate electrode includes a second metal film formed on the second gate insulating film, and a second silicon film formed on the second metal film.   
     
     
         10 . The semiconductor device of  claim 1 , further comprising:
 a first sidewall which is formed on a side surface of the first gate electrode, and has an L-shaped cross section;   a second sidewall which is formed on a side surface of the second gate electrode, and has an L-shaped cross section; and   an insulating film formed on the first active region and the second active region to cover the first gate electrode, the first sidewall, the second gate electrode, and the second sidewall.   
     
     
         11 . The semiconductor device of  claim 10 , wherein
 the insulating film is a stress-applying insulating film which applies tensile stress in a gate length direction of a channel region of the first active region, and   the insulating film is in contact with a surface of the first sidewall.   
     
     
         12 . The semiconductor device of  claim 1 , wherein
 the first MIS transistor is an n-type MIS transistor, and   the second MIS transistor is a p-type MIS transistor.   
     
     
         13 . The semiconductor device of  claim 1 , wherein
 a concentration of the first adjusting metal in the second high dielectric constant film decreases from a top to a bottom of the second high dielectric constant film.   
     
     
         14 . The semiconductor device of  claim 1 , wherein
 a concentration of nitrogen in the first high dielectric constant film decreases from a top to a bottom of the first high dielectric constant film.   
     
     
         15 . The semiconductor device of  claim 1 , wherein
 the first high dielectric constant film contains nitrogen, and   the first active region contains nitrogen.   
     
     
         16 . The semiconductor device of  claim 4 , wherein
 a concentration of the second adjusting metal in the first high dielectric constant film decreases from a top to a bottom of the first high dielectric constant film.   
     
     
         17 . The semiconductor device of  claim 9 , wherein
 the first metal film and the second metal film are made of the same metal material.