Supply regulated charge pump system

Abstract

An apparatus and a method for maintaining an output voltage of a charge pump circuit near a target voltage is disclosed. A regulated supply voltage is generated based on the output voltage of the charge pump. The regulated supply voltage is applied to a voltage input to the charge pump circuit and to a voltage input of a clock driver that provides a regulated clock signal to the charge pump circuit.

1 - 21 . (canceled) 
     
     
         22 . A method, comprising:
 generating a regulated clock signal having an amplitude;   applying the regulated clock signal to a clock input of a charge pump circuit, wherein the charge pump circuit generates an output voltage; and   adjusting the output voltage of the charge pump circuit by changing the amplitude of the regulated clock signal.   
     
     
         23 . The method of  claim 22 , wherein the regulated clock signal has a frequency and wherein the frequency of the regulated clock signal is independent from the output voltage of the charge pump circuit. 
     
     
         24 . The method of  claim 23 , wherein the frequency is a substantially constant. 
     
     
         25 . The method of  claim 22 , wherein generating a regulated clock signal comprises:
 supplying a reference clock signal to a clock driver; and   supplying a regulated voltage to the clock driver; and   generating the regulated clock output, using the reference clock signal and the regulated voltage, to be used as the regulated clock signal.   
     
     
         26 . The method of  claim 22 , where a voltage level of the output voltage of the charge pump circuit increases or decreases according to the change in amplitude of the regulated clock signal. 
     
     
         27 . The method of  claim 26 , further comprising supplying a regulated voltage to a voltage input of the charge pump circuit, wherein the output voltage of the charge pump circuit is also adjusted by changing regulated voltage. 
     
     
         28 . The method of  claim 23 , further comprising receiving a reference clock signal to determine the frequency and a duty cycle of the regulated clock signal 
     
     
         29 . The method of  claim 23 , wherein the output voltage of the charge pump circuit has a ripple voltage less than about 50 millivolts. 
     
     
         30 . The method of  claim 23 , wherein a ripple voltage frequency of the output voltage is independent of a load current supplied by the charge pump circuit. 
     
     
         31 . The method of  claim 23 , wherein the charge pump circuit comprises a plurality of charge pump cells being cascaded in stages with an output of a preceding one of the plurality of charge pump cells coupled to an input of a subsequent one of the plurality of charge pump cells, wherein each of the plurality of charge pump cells has a clock input configured to receive the regulated clock signal. 
     
     
         32 . A charge pump system, comprising:
 a clock driver having a clock output to generate a regulated clock signal; and   a charge pump circuit to generate an output voltage, the charge pump circuit comprising:
 a plurality of charge pump cells being cascaded in stages with an output of a preceding one of the plurality of charge pump cells coupled to an input of a subsequent one of the plurality of charge pump cells, wherein each of the plurality of charge pump cells has a clock input configured to receive the regulated clock signal from the clock driver, wherein the clock driver is configured to adjust the output voltage of the charge pump circuit by changing an amplitude of the regulated clock signal. 
   
     
     
         33 . The charge pump system of  claim 32 , wherein the regulated clock signal has a frequency and wherein the frequency of the regulated clock signal is independent of the output voltage of the charge pump circuit. 
     
     
         34 . The charge pump system of  claim 33 , wherein the frequency is substantially constant. 
     
     
         35 . The charge pump system of  claim 32 , wherein the clock driver is configured to receive a reference clock signal that determines a frequency and a duty cycle of the regulated clock signal. 
     
     
         36 . The charge pump system of  claim 32 , wherein the clock driver comprises pulse logic configured to produce the regulated clock signal and an inverted clock signal, wherein pulses of the inverted clock signal are non-overlapping with respect to pulses of the regulated clock signal. 
     
     
         37 . The charge pump system of  claim 32 , wherein the preceding one of the plurality of charge pump cells boosts an output voltage of the subsequent one of the plurality of charge pump cells. 
     
     
         38 . The charge pump system of  claim 32 , wherein the output voltage of the charge pump circuit has a ripple voltage less than about 50 millivolts. 
     
     
         39 . The charge pump system of  claim 32 , wherein the output voltage is provided at an output node of the charge pump circuit and wherein the charge pump system further comprises a load filter capacitor coupled to the output node. 
     
     
         40 . The charge pump system of  claim 39 , wherein a ripple voltage frequency of the output voltage is independent of a load current at the output node.