Nonvolatile semiconductor memory device

Abstract

A nonvolatile semiconductor memory device includes a memory cell array including memory cells each provided at individual intersection between a first wiring and a second wiring, the memory cell comprising a variable resistive element, and predetermined numbers of the memory cells shearing the same first wiring to configure a page; a first control circuit configured to select a page subjected to data-writing, and to supply a constant voltage to the first wiring belonging to the selected page; a writing-voltage generating circuit configured to generate plural kinds of writing voltages for programming a resistance of the variable resistive element to one of three or more values based on a write-in data specifying three or more values; and a second control circuit configured to select the page subjected to data-writing, and to supply the writing voltages to predetermined numbers of the respective second wirings belonging to the selected page.

1 . A nonvolatile semiconductor memory device comprising:
 a memory cell array including a plurality of first and second wirings intersecting one another, and memory cells each provided at individual intersections between the plurality of first wirings and the plurality of second wirings, and each comprising a variable resistive element, the plurality of first wirings being connected to the memory cells respectively; and   a control circuit configured to select one of the plurality of first wirings, supplying a first voltage to the selected first wiring, and supplying plural kinds of writing voltages to the plurality of second wirings.   
     
     
         2 . The nonvolatile semiconductor memory device according to  claim 1 , wherein at least two of the plural kinds of writing voltages have a different pulse height. 
     
     
         3 . The nonvolatile semiconductor memory device according to  claim 1 , wherein at least two of the plural kinds of writing voltages have a different pulse width. 
     
     
         4 . The nonvolatile semiconductor memory device according to  claim 2 , wherein at least two of the plural kinds of writing voltages have a different pulse width. 
     
     
         5 . The nonvolatile semiconductor memory device according to  claim 1 , wherein the memory cell further comprises a non-ohmic element connected to the variable resistive element in series. 
     
     
         6 . The nonvolatile semiconductor memory device according to  claim 5 , wherein the non-ohmic element of the memory cell is a diode. 
     
     
         7 . The nonvolatile semiconductor memory device according to  claim 6 , wherein
 the diode of the memory cell has an anode connected to the second wiring and has a cathode connected to the first wiring, and   the writing voltage is higher than the first voltage of the first wiring.   
     
     
         8 . The nonvolatile semiconductor memory device according to  claim 1 , wherein the control circuit supplies a voltage to an unselected one of the plurality of first wirings higher than the plural kinds of writing voltages. 
     
     
         9 . The nonvolatile semiconductor memory device according to  claim 1 , wherein the memory cell is configured to store three or more bit data. 
     
     
         10 . The nonvolatile semiconductor memory device according to  claim 1 , further comprising an encoding/decoding circuit configured to generate, by decoding input data, write-in data having three or more values. 
     
     
         11 . The nonvolatile semiconductor memory device according to  claim 1 , wherein the control circuit simultaneously supplies plural kinds of writing voltages to the plurality of second wirings. 
     
     
         12 . The nonvolatile semiconductor memory device according to  claim 1 , wherein the plural kinds of writing voltages supplied to the plurality of second wirings drop at the same time. 
     
     
         13 . The nonvolatile semiconductor memory device according to  claim 4 , wherein the control circuit simultaneously supplies plural kinds of writing voltages to the plurality of second wirings. 
     
     
         14 . The nonvolatile semiconductor memory device according to  claim 1 , wherein a resistance of the variable resistive element changes to one of three or more values based on the plural kinds of writing voltages. 
     
     
         15 . The nonvolatile semiconductor memory device according to  claim 1 , wherein the control circuit is configured to write data in batch to the memory cells connected to one of the plurality of first wirings. 
     
     
         16 . The nonvolatile semiconductor memory device according to  claim 1 , wherein the first voltage is constant.