Internal supply voltage generating circuit and method for generating internal supply voltage

Abstract

An internal supply voltage generating circuit includes a clock comparator configured to compare a first clock signal having clock information corresponding to a level of a reference voltage with a second clock signal having clock information corresponding to a level of an internal supply voltage, a control signal generator configured to generate a driving control voltage having a voltage level corresponding to an output signal of the clock comparator, and a driver configured to drive a terminal of the internal supply voltage in response to the driving control voltage.

1 . An internal supply voltage generating circuit comprising:
 a clock comparator configured to compare a first clock signal having clock information corresponding to a level of a reference voltage with a second clock signal having clock information corresponding to a level of an internal supply voltage;   a control signal generator configured to generate a driving control voltage having a voltage level corresponding to an output signal of the clock comparator; and   a driver configured to drive a terminal of the internal supply voltage in response to the driving control voltage.   
     
     
         2 . The internal supply voltage generating circuit of  claim 1 , wherein the control signal generator generates the driving control voltage through a charge pumping operation in response to the output signal of the clock comparator. 
     
     
         3 . The internal supply voltage generating circuit of  claim 1 , wherein the clock comparator includes:
 a clock generating unit configured to generate the first and second clock signals in response to the reference voltage and the internal supply voltage; and   a comparing unit configured to compare the first and second clock signals.   
     
     
         4 . The internal supply voltage generating circuit of  claim 3 , wherein the clock generating unit includes:
 a first voltage controlled delay line configured to generate a first delayed clock signal corresponding to the first clock signal by delaying a source clock signal by a first delay time corresponding to a level of the internal supply voltage; and   a second voltage controlled delay line configured to generate a second delayed clock signal corresponding to the second clock signal by delaying the source clock signal by a second delay corresponding to a level of the reference voltage.   
     
     
         5 . The internal supply voltage generating circuit of  claim 4 , wherein the comparing unit configured to compare a phase of the first delayed clock signal with a phase of the second delayed clock signal. 
     
     
         6 . A method for generating an internal supply voltage, comprising:
 converting a level of an internal supply voltage and a level of a reference voltage to first clock information and second clock information, respectively;   comparing the first clock information and the second clock information and generating a detection signal based on the comparison; and   generating the internal supply voltage according to the detection signal.   
     
     
         7 . The method of  claim 6 , wherein converting the levels of the internal supply voltage and the reference voltage includes:
 generating a first delayed clock signal by delaying a source clock signal by a first delay corresponding to a level of the internal supply voltage; and   generating a second delayed clock signal by delaying the source clock signal by a second delay corresponding to a level of the reference voltage.   
     
     
         8 . The method of  claim 7 , wherein the detection signal has a pulse width corresponding to a phase difference between the first delayed clock signal and the second delayed clock signal. 
     
     
         9 . The method of  claim 6 , wherein generating the internal supply voltage includes:
 generating a driving control voltage having a voltage level corresponding to the detection signal; and   generating the internal supply voltage in response to the driving control voltage.   
     
     
         10 . The method of  claim 9 , wherein generating the driving control voltage includes performing a charge pumping operation in response to the detection signal.