US2012174083A1PendingUtilityA1
Dynamic optimization for removal of strong atomicity barriers
Est. expiryJun 19, 2028(~1.9 yrs left)· nominal 20-yr term from priority
G06F 8/443G06F 8/4435
49
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Claims
Abstract
A method and apparatus for dynamic optimization of strong atomicity barriers is herein described. During runtime compilation, code including non-transactional memory accesses that are to conflict with transactional memory accesses is patched to insert transactional barriers at the conflicting non-transactional memory accesses to ensure isolation and strong atomicity. However, barriers are omitted or removed from non-transactional memory accesses that do not conflict with transactional memory accesses to reduce barrier execution overhead.
Claims
exact text as granted — not AI-modified1 . A machine readable medium including compiler code which, when executed by a machine, causes the machine to perform the operations of:
determining a plurality of memory accesses in program code that cannot conflict with transactions utilizing not accessed in a transaction (NAIT) analysis; and compiling the plurality of memory accesses into a plurality of compiled memory accesses in response to determining the plurality of memory accesses in the program code that cannot conflict with transactions utilizing not accessed in a transaction (NAIT) analysis, wherein compiled memory accesses, when executed, are to access memory without performing barriers to detect data conflicts.
2 . The machine readable medium of claim 1 , wherein determining a plurality of memory accesses in program code that cannot conflict with transactions utilizing not accessed in a transaction (NAIT) analysis comprises:
maintaining a table including an entry for each of the plurality of memory accesses comprising a reference to a data object associated with each of the plurality of memory accesses; determining the plurality of memory accesses cannot conflict with transactions in response to each entry for each of the plurality of memory accesses comprising a not accessed in a transaction state.
3 . The machine readable medium of claim 1 , wherein determining a plurality of memory accesses in program code that cannot conflict with transactions utilizing not accessed in a transaction (NAIT) analysis comprises:
determining no transactional memory accesses reference a data object associated with each of the plurality of memory accesses.
4 . The machine readable medium of claim 1 , wherein compiled memory accesses, when executed, are to access memory without performing barriers to detect data conflicts comprises: the compiled memory accesses, when executed, are to access memory without performing operations to ensure isolation.
5 . The machine readable medium of claim 1 , wherein compiling the plurality of memory accesses into a plurality of compiled memory accesses in response to determining the plurality of memory accesses in the program code that cannot conflict with transactions utilizing not accessed in a transaction (NAIT) analysis, wherein compiled memory accesses, when executed, are to access memory without performing barriers to detect data conflicts comprises: compiling the plurality of memory accesses into a plurality of direct memory accesses, which when executed, are to access memory without performing operations to ensure isolation.
6 . A machine readable medium including compiler code which, when executed by a machine, causes the machine to perform the operations of:
determining a location that is not accessed in a transaction utilizing Not Accessed in a Transaction (NAIT) analysis; determining an object that is read-only in a transaction; compiling a first memory access to the location into a first compiled memory access, wherein the first compiled memory accesses, when executed, is to access the location without performing barriers to detect data conflicts; and compiling a second memory access to the object into a second compiled memory access, wherein the second compiled memory accesses, when executed, is to access the object without performing barriers to detect data conflicts.
7 . The article of manufacture of claim 6 , wherein determining a location that is not accessed in a transaction utilizing Not Accessed in a Transaction (NAIT) analysis comprises: determining the location is not accessed in a transaction in response to a table including a reference to the location holding a not accessed in a transaction state responsive to no potential conflicting transactional memory access operation referencing the location.
8 . The article of manufacture of claim 7 , wherein determining an object that is read-only in a transaction; comprises: determining the object is read only in a transaction in response to the table including a reference to the object holding a read only transactional state responsive to a transactional memory read access operation referencing the object.
9 . The article of manufacture of claim 6 , wherein compiling a first memory access to the location into a first compiled memory access, wherein the first compiled memory accesses, when executed, is to access the location without performing barriers to detect data conflicts comprises: compiling the first memory access to the location into a direct memory access to the location, wherein direct memory access, when executed, is to access the location without performing operations to ensure isolation.
10 . The article of manufacture of claim 6 , wherein compiling a second memory access to the object into a second compiled memory access, wherein the second compiled memory accesses, when executed, is to access the object without performing barriers to detect data conflicts comprises: compiling the second memory access to the object into a direct memory access to the object, wherein direct memory access, when executed, is to access the object without performing operations to ensure isolation.Join the waitlist — get patent alerts
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