US2012174359A1PendingUtilityA1

Semiconductor device having function of improved electrostatic discharge protection

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Assignee: YANG HYANG-JAPriority: Mar 17, 2006Filed: Mar 26, 2012Published: Jul 12, 2012
Est. expiryMar 17, 2026(expired)· nominal 20-yr term from priority
Inventors:Hyang-Ja Yang
G01B 3/1084G01B 3/30H10D 89/611
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Claims

Abstract

A semiconductor device includes a diode region having a plurality of protection diodes and a pad region overlapped with an upper part of the diode region. The pad region having a pad installed corresponding to an external connection terminal. The semiconductor device further includes a contact plug unit which connects at least one of a plurality of active regions constituting the diode region and the pad within the diode region.

Claims

exact text as granted — not AI-modified
1 . A method of electrically connecting a protection device and a bonding pad in a semiconductor integrated circuit, the method comprising:
 using a contact plug to vertically connect a lower part of the bonding pad and an upper part of a first active region of the protection device for an electrostatic discharge through an insulation layer, and electrically connecting the first active region with the bonding pad positioned in an upper part of a device formation region where a plurality of protection devices are formed.   
     
     
         2 . The method of  claim 1 , wherein on the first active region of the protection device, a first metal contact and a via contact are formed overlapping with each other, and wherein on a second active region of the protection device, a second metal contact is formed. 
     
     
         3 . The method of  claim 2 , further comprising:
 electrically connecting, by a via contact, an upper metal layer and a lower metal layer; and   electrically connecting, by a metal contact, the lower metal layer and the first active region,   wherein the upper metal layer is connected to the bonding pad and positioned under a lower part of the bonding pad, wherein the lower metal layer is positioned under a lower part of the upper metal layer, and wherein the metal contact is positioned overlapping a vertically lower part of the via contact.   
     
     
         4 . The method of  claim 3 , further comprising:
 patterning a first region of the lower metal layer with a first pattern which has a gate frame shape extended corresponding to a second active region; and   patterning a second region of the lower metal layer with a second pattern of a rectangular shape,   wherein the second pattern forms a web structure with the first pattern, and wherein the second pattern is isolated from a unit gate frame of the first pattern within an open region of the first pattern, corresponding to the first active region.   
     
     
         5 . The method of  claim 4 , wherein the first active region has substantially the same shape as the shape of the second pattern. 
     
     
         6 . The method of  claim 4 , wherein the second active region has substantially the same shape as the shape of the second pattern. 
     
     
         7 . The method of  claim 4 , wherein each of the plurality of protection devices is a p-type diode to discharge a positive static to protect an internal circuit when static electricity of a positive voltage flows into the bonding pad. 
     
     
         8 . The method of  claim 4 , wherein each of the plurality of protection devices is an n-type diode to discharge a negative static to protect an internal circuit when static electricity of a negative voltage flows into the bonding pad. 
     
     
         9 . The method of  claim 4 , wherein the first active region is a high density p-type diffusion region, and the second active region is a high density n-type diffusion region. 
     
     
         10 . The method of  claim 4 , wherein the bonding pad includes one of an input pad, an output pad or an input/output pad.

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