Vertical channel type non-volatile memory device and method for fabricating the same

Abstract

A method for fabricating a vertical channel type non-volatile memory device including forming a source region, alternately forming a plurality of interlayer dielectric layers and a plurality of conductive layers for a gate electrode over a substrate with the source region formed therein, forming a trench exposing the source region by etching the plurality of interlayer dielectric layers and the plurality of conductive layers for a gate electrode, and siliciding the conductive layers for a gate electrode and the source region that are exposed through the trench.

1 - 8 . (canceled) 
     
     
         9 . A vertical channel type non-volatile memory device, comprising:
 a source region;   a channel configured to be coupled with the source region and protruding from a substrate; and   a plurality of memory cells stacked along the channel,   wherein the source region and a gate electrode of each memory cell include a silicided portion.   
     
     
         10 . The vertical channel type non-volatile memory device of  claim 9 , further comprising:
 a lower selection transistor and an upper selection transistor each including a gate electrode having a silicided portion.   
     
     
         11 . The vertical channel type non-volatile memory device of  claim 9 , further comprising:
 a contact plug coupled with the source region.