Apparatus and Method for Programmable Power Management in a Programmable Analog Circuit Block

Abstract

An apparatus and method for programmable power management in a programmable analog circuit block. Specifically, the present invention describes an operational amplifier circuit that includes current sources that are coupled in parallel. Configuration bits are asserted to selectively enable or selectively disable one or more of the current sources in order to modulate the performance of the operational amplifier circuit block. Selective addition or removal of current sources increases or decreases the amount of current within the operational amplifier and, correspondingly, the speed and power consumption of the operational amplifier. Combinations of asserted configuration bits pass a bias voltage in order enable selected current sources. In one embodiment, the bias voltage can be increased in order to increase the current output of one of the current sources which, correspondingly, increases the speed of the operational amplifier circuit block.

1 . A programmable analog circuit block, comprising:
 at least one register configured to store a plurality of configuration bits; and   a plurality of current sources coupled with the at least one register, wherein each of the plurality of current sources is configured to output a current based on a value of at least one of the plurality of configuration bits.   
     
     
         2 . The programmable analog circuit block of  claim 1 , further comprising:
 a logic decoder for generating a plurality of select signals based on values of the plurality of configuration bits; and   a multiplexor configured to selectively apply a bias voltage to the plurality of current sources based on the plurality of select signals.   
     
     
         3 . The programmable analog circuit block of  claim 1 , wherein each of the current sources is a current mirror, and wherein each of the current sources supplies current for an operational amplifier. 
     
     
         4 . The programmable analog circuit block of  claim 1 , wherein each of the current sources is enabled by one of the plurality of configuration bits. 
     
     
         5 . The programmable analog circuit block of  claim 1 , wherein the plurality of current sources are connected in parallel. 
     
     
         6 . The programmable analog circuit block of  claim 1 , wherein the plurality of current sources comprises a pair of current mirrors, wherein a second current mirror of the at least one pair of current mirrors is configured to provide twice an amount of current provided by a first current mirror of the pair of current mirrors. 
     
     
         7 . The programmable analog circuit block of  claim 1 , wherein a second pair of current mirrors is configured to supply four times an amount of current provided by a first pair of current mirrors, and wherein a third pair of current mirrors is configured to supply twelve times the amount of current provided by the first pair of current mirrors. 
     
     
         8 . A method, comprising:
 in a programmable analog block, asserting a first group of configuration bits from a plurality of configuration bits;   generating a plurality of select signals based on values of the first group of configuration bits; and   in response to the plurality of select signals, enabling one or more current sources of the programmable analog block.   
     
     
         9 . The method of  claim 8 , wherein the one or more current sources comprises a plurality of associated pairs of current sources. 
     
     
         10 . The method of  claim 9 , wherein each configuration bit is configured to enable one of the plurality of associated pairs of current sources. 
     
     
         11 . The method of  claim 9 , further comprising supplying twice the amount of current from a second current source than from a first current source of each associated pair of current sources. 
     
     
         12 . The method of  claim 8 , further comprising using the enabled current sources to supply current for an operational amplifier. 
     
     
         13 . The method of  claim 12 , wherein a first current source in each associated pair is coupled to a first node that is coupled to transistors receiving input voltages to the operational amplifier, and a second current source in each pair is coupled with an output voltage to the operational amplifier, wherein each first current source coupled to the input voltage is coupled in parallel, and wherein each second current source coupled to said output voltage is coupled in parallel. 
     
     
         14 . A programmable device, comprising:
 a microcontroller; and   a programmable analog block coupled with the microcontroller, wherein the programmable analog block comprises:
 at least one register configured to store a plurality of configuration bits; and 
 a plurality of current sources each configured to output a current based on a value of at least one of the plurality of configuration bits. 
   
     
     
         15 . The programmable device of  claim 14 , further comprising:
 a logic decoder for generating a plurality of select signals based on values of the plurality of configuration bits; and   a multiplexor configured to selectively apply a bias voltage to the plurality of current sources based on the plurality of select signals.   
     
     
         16 . The programmable device of  claim 14 , wherein each of the current sources is a current mirror, and wherein each of the current sources supplies current for an operational amplifier. 
     
     
         17 . The programmable device of  claim 14 , wherein each of the current sources is enabled by one of the plurality of configuration bits. 
     
     
         18 . The programmable device of  claim 14 , wherein the plurality of current sources are connected in parallel. 
     
     
         19 . The programmable device of  claim 14 , wherein the plurality of current sources comprises a pair of current mirrors, wherein a second current mirror of the at least one pair of current mirrors is configured to provide twice an amount of current provided by a first current mirror of the pair of current mirrors. 
     
     
         20 . The programmable device of  claim 14 , wherein a second pair of current mirrors is configured to supply four times an amount of current provided by a first pair of current mirrors, and wherein a third pair of current mirrors is configured to supply twelve times the amount of current provided by the first pair of current mirrors.