Method of sensing of low-voltage image sensor

Abstract

A sensing method of an image sensor. The image sensor includes: a light receiving device; a signal conversion unit including a transfer transistor having a plurality of transfer gates and for converting photocharges generated by the light receiving device into a voltage to output the voltage; and a sensing control unit for generating at least two reset signals and/or at least two transfer signals applied to the transfer gates of the transfer transistor during a one-time photosensing cycle. The image sensor is obtained by changing the structure and driving method of a transfer transistor of a typical 4-transistor CMOS image sensor and employs a deep depletion operation and a multiple reset operation, thereby reducing an image lag and increasing the well capacity of the light receiving device.

1 . A method of sensing a complementary metal oxide semiconductor (CMOS) image sensor including a light receiving device and a diffusion node during a one-time sensing cycle, the method comprising the steps of:
 (a) resetting the light receiving device of the CMOS image sensor;   (b) condensing light into the light receiving device; and   (c) transferring photocharges generated by the light receiving device to the diffusion node,   wherein step (a) comprises the step of resetting the light receiving device at least twice and/or step (c) comprises the step of transferring the photocharges to the diffusion node at least twice.   
     
     
         2 . The method according to  claim 1 , further comprising the step of reading a voltage of the diffusion node after step (c). 
     
     
         3 . The method according to  claim 1 , which is performed on a CMOS image sensor including a transfer transistor having a plurality of transfer gates. 
     
     
         4 . The method according to  claim 3 , wherein step (a) comprises the step of sequentially turning on the transfer gates of the transfer transistor such that a transfer gate close to the light receiving device is turned on earlier than a transfer gate far from the light receiving device. 
     
     
         5 . The method according to  claim 4 , wherein reset signals are applied to the respective transfer gates of the transfer transistor to turn on the transfer gates,
 wherein a turn-on period of a final reset signal of the reset signals is the longest of all.   
     
     
         6 . The method according to  claim 3 , wherein a turn-off voltage of at least one of the reset signals is at a lower level than a ground voltage. 
     
     
         7 . The method according to  claim 3 , wherein a turn-on voltage of at least one of the reset signals, which is applied to a transfer gate closest to the light receiving device, is at the highest level. 
     
     
         8 . The method according to  claim 3 , wherein step (c) comprises the step of sequentially turning on the transfer gates of the transfer transistor such that a transfer gate close to the light receiving device is turned on earlier than a transfer gate far from the light receiving device. 
     
     
         9 . The method according to  claim 8 , wherein transfer signals are applied to the respective transfer gates of the transfer transistor to turn on the transfer gates,
 wherein a turn-on period of a final transfer signal of the transfer signals is the longest of all.   
     
     
         10 . The method according to  claim 3 , wherein a turn-off voltage of at least one of the transfer signals is at a lower level than a ground voltage. 
     
     
         11 . The method according to  claim 3 , wherein a turn-on voltage of at least one of the transfer signals, which is applied to a transfer gate closest to the light receiving device, is at the highest level. 
     
     
         12 . The method according to  claim 1 , wherein, in step (a), turn-on periods of reset signals applied to adjacent transfer gates partially overlap. 
     
     
         13 . The method according to  claim 1 , wherein, in step (c), turn-on periods of transfer signals applied to adjacent transfer gates partially overlap.