Semiconductor device and method of manufacturing the same

Abstract

The present invention provides a semiconductor device including SRAM cell units each including a data holding section made up of a pair of driving transistors and a pair of load transistors, a data write section made up of a pair of access transistors, and a data read section made up of an access transistor and a driving transistor, wherein each of the transistors includes a semiconductor layer projecting upward from a base plane, a gate electrode extending from a top to opposite side surfaces of the semiconductor layer so as to stride the semiconductor layer, a gate insulating film between the gate electrode and the semiconductor layer, and source/drain areas, a longitudinal direction of each of the semiconductor layers is provided along a first direction, and for all the corresponding transistors between the SRAM cell units adjacent to each other in the first direction, the semiconductor layer in one of the corresponding transistors is located on a center line of the semiconductor layer along the first direction in the other transistor.

1 . A method of manufacturing a semiconductor device including SRAM cell units each comprising a data holding section comprising a pair of a first driving transistor and a second driving transistor and a pair of a first load transistor and a second load transistor, a data write section comprising a pair of a first access transistor and a second access transistor, and a data read section comprising a third access transistor and a third driving transistor, wherein each of the transistors comprises a semiconductor layer projecting upward from a base plane, a gate electrode extending from a top to opposite side surfaces of the semiconductor layer so as to stride the semiconductor layer, a gate insulating film interposed between the gate electrode and the semiconductor layer, and a pair of a source area and a drain area provided in the semiconductor layer, the method comprising:
 patterning a semiconductor layer to form a semiconductor layer pattern including a striped pattern in which long semiconductor layers extending in a first direction and having an equal width in a second direction perpendicular to the first direction are arranged at equal intervals;   removing a part of the striped pattern;   forming a gate insulating film on side surfaces of the remaining long semiconductor layers;   depositing a gate electrode material and patterning the gate electrode material deposited film to form a gate electrode extending from a top to opposite side surfaces of each of the long semiconductor layers along the second direction so as to stride the long semiconductor layer; and   introducing impurities into each long semiconductor layer to form source/drain areas.   
     
     
         2 . The method of manufacturing the semiconductor device according to  claim 1 , wherein the semiconductor layer pattern is formed to be line symmetric to each of four sides of a rectangular unit boundary corresponding to a SRAM cell unit boundary serving as a symmetry axis. 
     
     
         3 . The method of manufacturing the semiconductor device according to  claim 1 , wherein
 in the formation of the semiconductor layer pattern, a band-like pattern is formed, the band-like pattern crossing the long semiconductor layers and having a first-direction width greater than the second-direction width of each of the long semiconductor layers; and   in the removal of a part of the striped pattern, a part of the band-like pattern is also removed to form a pad semiconductor layer having a second-direction width greater than a second-direction width of each of the long semiconductor layers for connecting a contact connected with an upper layer wire to the pad semiconductor layer.   
     
     
         4 . The method of manufacturing the semiconductor device according to  claim 1 , further comprising forming a cap insulating layer on the semiconductor layer, wherein the semiconductor layer and the cap insulating layer are patterned to form the semiconductor layer pattern with the cap insulating layer formed thereon. 
     
     
         5 . The method of manufacturing the semiconductor device according to  claim 1 , wherein the semiconductor layer provided on a base insulating layer is patterned to form the semiconductor layer pattern provided on the base insulating layer. 
     
     
         6 . The method of manufacturing the semiconductor device according to  claim 1 , further comprising patterning a semiconductor substrate as the semiconductor layer to form the semiconductor layer pattern and then forming a separating insulating layer on the semiconductor substrate, and removing a top surface-side part of the separating insulating layer to expose the semiconductor layer pattern so that the semiconductor layer pattern projects upward from the remaining separating insulating film.