Semiconductor device and method for manufacturing semiconductor device

Abstract

A method for manufacturing a semiconductor device includes forming a first gate electrode on a semiconductor substrate in a first transistor region; forming a channel dose region; and forming a first source extension region, wherein the channel dose region is formed by using a first mask as a mask and by ion-implanting a first dopant of the first conductivity type, and the first mask covering a drain side of the first gate electrode and covering a drain region, and the first source extension region is formed by using a second mask and the gate electrode as masks and by ion-implanting a second dopant of a second conductivity type that is a conductivity type opposite to the first conductivity type, the second mask covering the drain side of the first gate electrode and covering the drain region.

1 . A method for manufacturing a semiconductor device comprising:
 forming a first gate electrode on a semiconductor substrate in a first transistor region in which a first transistor of a first conductivity type is to be formed;   forming a channel dose region on the semiconductor substrate, the channel dose region is formed by using a first mask as a mask and by ion-implanting a first dopant of the first conductivity type with acceleration energy that passes through the first gate electrode, the channel dose region having a first depth in a source region of the first transistor and having a second depth under the gate electrode, and the first mask covering a drain side of the first gate electrode and covering a drain region of the first transistor, the second depth being shallower than the first depth; and   forming a first source extension region in the semiconductor substrate, the first source extension region is formed by using a second mask and by ion-implanting a second dopant of a second conductivity type that is a conductivity type opposite to the first conductivity type, the second mask covering the drain side of the first gate electrode and covering the drain region.   
     
     
         2 . The method for manufacturing the semiconductor device according to  claim 1 , wherein the ion implantation for the formation of the first source extension region are performed at an incidence angle in the range from 0° to 7° with respect to a line normal to the substrate. 
     
     
         3 . The method for manufacturing the semiconductor device according to  claim 2 , wherein the ion implantation for the formation of the channel dose region is performed at an incidence angle in the range from 0° to 7° with respect to a line normal to the substrate. 
     
     
         4 . The method for manufacturing the semiconductor device according to  claim 2 , wherein the ion implantation for the formation of the channel dose region is performed in a direction that is tilted from a line normal to the substrate to a side of the source region at an incidence angle in the range from 20° to 45°. 
     
     
         5 . The method for manufacturing the semiconductor device according to  claim 1 , further comprising:
 forming the drain region of the second conductivity type in the first transistor region before the formation of the first gate electrode, the drain region of the second conductivity type overlapping the drain side of the gate electrode.   
     
     
         6 . The method for manufacturing the semiconductor device according to  claim 1 , wherein the first mask is used as the second mask. 
     
     
         7 . The method for manufacturing the semiconductor device according to  claim 1 , further comprising:
 preparing the semiconductor substrate having a second transistor region in which a second transistor of the first conductivity type is to be formed and having a third transistor region in which a third transistor of the first conductivity type is to be formed;   forming a second gate electrode in the second transistor region; and   forming a third gate electrode in the third transistor region,   wherein the first mask covers the second transistor region and the third transistor region, and   the second mask does not cover the second transistor region.   
     
     
         8 . The method for manufacturing the semiconductor device according to  claim 7 , further comprising:
 forming a pocket region in the semiconductor substrate, the pocket region is formed by using a third mask and by obliquely ion-implanting a third dopant of the first conductivity type into the third transistor region, the third mask covering the second transistor region and covering the first transistor region, and the third gate electrode being positioned in the third transistor region, and   forming a third source extension region in the semiconductor substrate, the third source extension region is formed by using the third mask and by ion-implanting a fourth dopant of the second conductivity type into the third transistor region at a peak position shallower than the pocket region, the third gate electrode being positioned in the third transistor region.   
     
     
         9 . The method for manufacturing the semiconductor device according to  claim 8 , wherein the ion implantation into the pocket region has a depth that is less than or equal to half a depth of the ion implantation into the channel dose region and has a dose amount that is greater than or equal to five times a dose amount of the ion implantation into the channel dose region. 
     
     
         10 . The method for manufacturing the semiconductor device according to  claim 7 , further comprising:
 forming an insulating offset mask in a predetermined length that extends from a side wall of the drain side of the first gate electrode in the first transistor region to the drain region;   forming a side wall spacer on a side wall of a source side of the first gate electrode;   forming a diffusion region of the second conductivity type outside the side wall spacer and the insulating offset mask; and   forming a silicide layer in the diffusion region.