US2012211273A1PendingUtilityA1

Via stub elimination

54
Assignee: KUCZYNSKI JOSEPHPriority: Aug 19, 2008Filed: Mar 9, 2012Published: Aug 23, 2012
Est. expiryAug 19, 2028(~2.1 yrs left)· nominal 20-yr term from priority
H05K 2203/056Y10T29/49155H05K 2201/09645H05K 3/422Y10T29/49126B33Y 80/00H05K 3/184H05K 1/115Y10T29/49165H05K 1/0237H05K 2203/0565H05K 3/0082Y10T29/4913H05K 3/429
54
PatentIndex Score
0
Cited by
0
References
0
Claims

Abstract

An enhanced mechanism is disclosed for via stub elimination in printed wiring boards (PWBs) and other substrates. In one embodiment, the substrate includes a plurality of insulator layers and internal conductive traces. First and second through-holes extend completely through the substrate and respectively pass through first and second ones of the internal conductive traces, which are at different depths within the substrate. Photolithographic techniques are used to generate plated-through-hole (PTH) plugs of controlled, variable depth in the through-holes before first and second conductive vias are respectively plated onto the first and second through-holes. The depth of these PTH plugs is controlled (e.g., using a photomask and/or variable laser power) to prevent the first and second conductive vias from extending substantially beyond the first and second internal conductive traces, respectively, and thereby prevent via stubs from being formed in the first place.

Claims

exact text as granted — not AI-modified
1 . An apparatus, comprising:
 a substrate having a plurality of insulator layers and one or more internal conductive traces, wherein a first through-hole extends completely through the substrate from a first surface of the substrate to a second surface of the substrate, and wherein the first through-hole passes through a first one of the one or more internal conductive traces;   a first conductive via plated onto the first through-hole, wherein the first conductive via extends from the substrate's first surface to and terminates in a non-tooled edge substantially at the first internal conductive trace.   
     
     
         2 . The apparatus as recited in  claim 1 , wherein a second through-hole extends completely through the substrate from the substrate's first surface to the substrate's second surface, wherein the second through-hole passes through a second one of the internal conductive traces, and wherein the second internal conductive trace lies deeper within the substrate with respect to the substrate's first surface than does the first internal conductive trace, the apparatus further comprising:
 a second conductive via plated onto the second through-hole, wherein the second conductive via extends from the substrate's first surface to and terminates in a non-tooled edge substantially at the second internal conductive trace.   
     
     
         3 . The apparatus as recited in  claim 2 , wherein a third through-hole extends completely through the substrate from the substrate's first surface to the substrate's second surface, the apparatus further comprising:
 a third conductive via plated onto the third through-hole, wherein the third conductive via extends completely through the substrate from the substrate's first surface to the substrate's second surface.   
     
     
         4 . The apparatus as recited in  claim 1 , wherein the substrate is an interconnect substrate. 
     
     
         5 . The apparatus as recited in  claim 1 , wherein the substrate is a printed wiring board. 
     
     
         6 . An apparatus, comprising:
 a substrate having a plurality of insulator layers and one or more internal conductive traces, wherein a first through-hole extends completely through the substrate from a first surface of the substrate to a second surface of the substrate, wherein the first through-hole passes through a first one of the one or more internal conductive traces, wherein a second through-hole extends completely through the substrate from the substrate's first surface to the substrate's second surface, wherein the second through-hole passes through a second one of the internal conductive traces, and wherein the second internal conductive trace lies deeper within the substrate with respect to the substrate's first surface than does the first internal conductive trace;   a first conductive via plated onto the first through-hole, wherein the first conductive via extends from the substrate's first surface to and terminates in a non-tooled edge substantially at the first internal conductive trace;   a second conductive via plated onto the second through-hole, wherein the second conductive via extends from the substrate's first surface to and terminates in a non-tooled edge substantially at the second internal conductive trace.   
     
     
         7 . The apparatus as recited in  claim 6 , wherein a third through-hole extends completely through the substrate from the substrate's first surface to the substrate's second surface, the apparatus further comprising:
 a third conductive via plated onto the third through-hole, wherein the third conductive via extends completely through the substrate from the substrate's first surface to the substrate's second surface.   
     
     
         8 . The apparatus as recited in  claim 6 , wherein the substrate is an interconnect substrate. 
     
     
         9 . The apparatus as recited in  claim 6 , wherein the substrate is a printed wiring board. 
     
     
         10 . An apparatus, comprising:
 a substrate having a plurality of insulator layers and one or more internal conductive traces, wherein a first through-hole extends completely through the substrate from a first surface of the substrate to a second surface of the substrate, and wherein the first through-hole passes through a first one of the one or more internal conductive traces;   a first conductive via plated onto the first through-hole, wherein the first conductive via extends from the substrate's first surface to and terminates in a non-tooled edge substantially at the first internal conductive trace;   wherein the apparatus is made by a method comprising the steps of:
 providing a substrate having a plurality of insulator layers and one or more internal conductive traces, wherein a first through-hole extends completely through the substrate from a first surface of the substrate to a second surface of the substrate, and wherein the first through-hole passes through a first one of the one or more internal conductive traces; 
 providing a first plated-through-hole (PTH) plug in the first through-hole, wherein the first PTH plug extends from a second end thereof at or adjacent to the substrate's second surface to a first end thereof at or adjacent to the first internal conductive trace; 
 providing a seed photoresist on portions of the substrate's first and second surfaces, wherein the seed photoresist has open regions in the vicinity of the first through-hole, and wherein the open regions of the seed photoresist expose a portion of the substrate's first surface adjacent the first through-hole, a portion of the first through-hole extending from the substrate's first surface to the first internal conductive trace, the first end of the first PTH plug, and the second end of the first PTH plug; 
 applying seed material to the seed photoresist, the exposed portion of the substrate's first surface, the exposed portion of the first through-hole, the exposed first end of the first PTH plug, and the exposed second end of the first PTH plug; 
 stripping the first PTH plug and the seed photoresist so that the seed material remains substantially only at a portion of the substrate's first surface adjacent the first through-hole and at a portion of the first through-hole extending from the substrate's first surface to the first internal conductive trace; 
 plating a first conductive via plating onto the first through-hole so that the first conductive via plating extends from the substrate's first surface to and terminates substantially at the first internal conductive trace.

Cited by (0)

No later patents cite this yet.

References (0)

No backward citations on record.