Nonvolatile semiconductor memory

Abstract

Disclosed is a nonvolatile memory system including at least one nonvolatile memory each having a plurality of nonvolatile memory cells and a buffer memory; and a control device coupled to the nonvolatile memory. The control device is enabled to receive external data and to apply the data to the nonvolatile memory, and the nonvolatile memory is enabled to operate a program operation including storing the received data to the buffer memory and storing the data held in the buffer memory to ones of nonvolatile memory cells. Moreover, the control device is enabled to receive external data while the nonvolatile memory is operating in the program operation. Also, the buffer memory is capable of receiving a unit of data, equal to the data length of data to be stored at one time of the program operation, the data length being more than 1 byte.

1 . A data storing apparatus comprising:
 a controller; and   a plurality of nonvolatile memories,   wherein each of the nonvolatile memories comprises an address buffer for   holding address information supplied from the controller and a plurality of nonvolatile memory cells, and is capable of receiving data from the controller, in response to pulses supplied from the controller, and after then starts to program data into ones of nonvolatile memory cells thereof selected by the address information, and
 wherein the controller (i) transfers data to a first nonvolatile memory of the plurality of nonvolatile memories in response to supplying the pulses to the first nonvolatile memory, (ii) stops supplying the pulses to the first nonvolatile memory with ending of the data outputting, and after then (iii) is capable of starting the transfer of data to a second nonvolatile memory of the plurality of nonvolatile memories in response to supplying the pulses to the second nonvolatile memory. 
   
     
     
         2 . A data storing apparatus according to  claim 1 ,
 wherein the controller supplies address information to a corresponding nonvolatile memory before supplying data.   
     
     
         3 . A data storing apparatus according to  claim 2 ,
 wherein the controller is supplied with first address information from outside of   
       the data storing apparatus, and comprises a decoder means for selecting one of the nonvolatile memories in accordance with the first address information. 
     
     
         4 . A data storing apparatus according to  claim 3 ,
 wherein each of the nonvolatile memories further comprises an address decoder and a plurality of word lines, each of the word lines is coupled with corresponding memory cells, and each of the nonvolatile memories selects one of the word lines in accordance with the address information supplied from the controller and decoded by the address decoder thereof.   
     
     
         5 . A data storing apparatus according to  claim 4 ,
 wherein each of the nonvolatile memories further comprises a data buffer for holding data supplied from the controller, temporarily.   
     
     
         6 . A data storing apparatus according to  claim 5 ,
 wherein each of the nonvolatile memories is capable of receiving the data, the amount of which is matched with the amount of data to be programmed to ones of the nonvolatile memory cells coupled with one word line, from the controller.   
     
     
         7 . A data storing apparatus comprising:
 a control circuit; and   a plurality of nonvolatile memories each of which comprises an address buffer and a nonvolatile memory array,   wherein each of the nonvolatile memories receives from the control circuit address information for holding in the address buffer thereof and data for programming into each nonvolatile memory array, and   wherein the control circuit supplies first address information and first data to a first nonvolatile memory of the plurality of nonvolatile memories, after then is capable of supplying second address information and second data to a second nonvolatile memory of the plurality of nonvolatile memories during programming of the first data in the first nonvolatile memory.   
     
     
         8 . A data storing apparatus according to  claim 7 ,
 wherein an address from outside of the data storing apparatus is received, and   wherein the control circuit uses the address received from outside for selecting one of the nonvolatile memories to be supplied with the address information and data, and generates the address information to supply to the selected one of the nonvolatile memories.   
     
     
         9 . A data storing apparatus according to  claim 8 , being coupled to a host system via a predetermined bus standard. 
     
     
         10 . A data storing apparatus according to  claim 9 ,
 wherein the predetermined bus standard is the Intelligent Device Electronics (IDE) standard.   
     
     
         11 . A data storing apparatus comprising:
 a controller; and   at least a first nonvolatile memory and a second nonvolatile memory, each of which comprises an address buffer for holding address information supplied from the controller and a plurality of nonvolatile memory cells,   wherein each of the nonvolatile memories is coupled to receive data from the controller, in response to pulses supplied from the controller, and after then starts to program data into ones of nonvolatile memory cells thereof selected by the address information, and   wherein the controller (i) transfers data to the first nonvolatile memory in response to supplying the pulses to the first nonvolatile memory, (ii) stops supplying the pulses to the first nonvolatile memory with ending of data outputting, and after then (iii) is enabled for starting the transfer of data to the second nonvolatile memory in response to supplying the pulses to the second nonvolatile memory.   
     
     
         12 . A data storing apparatus according to  claim 11 ,
 wherein the controller supplies address information to a corresponding nonvolatile memory before supplying data.   
     
     
         13 . A data storing apparatus according to  claim 12 ,
 wherein the controller is supplied with first address information from outside of the data storing apparatus, and comprises a decoder means for selecting one of the nonvolatile memories in accordance with the first address information.   
     
     
         14 . A data storing apparatus according to  claim 13 ,
 wherein each of the nonvolatile memories further comprises an address decoder and a plurality of word lines, each of the word lines is coupled with corresponding memory cells, and each of the nonvolatile memories selects one of the word lines in accordance with the address information supplied from the controller and decoded by the address decoder thereof.   
     
     
         15 . A data storing apparatus according to  claim 14 ,
 wherein each of the nonvolatile memories further comprises a data buffer for holding data supplied from the controller, temporarily.   
     
     
         16 . A data storing apparatus according to  claim 15 ,
 wherein each of the nonvolatile memories is configured to receive the data, the amount of which is matched with the amount of data to be programmed to ones of the nonvolatile memory cells coupled with one word line, from the controller.