US2012231582A1PendingUtilityA1

Device including a semiconductor chip

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Assignee: MEYER-BERG GEORGPriority: Nov 26, 2008Filed: May 22, 2012Published: Sep 13, 2012
Est. expiryNov 26, 2028(~2.4 yrs left)· nominal 20-yr term from priority
H10W 90/722H10W 72/874H10W 72/29H10W 72/9413H10W 72/0198H10W 70/60H10W 99/00H10W 90/736H10W 72/07338H10W 72/241H10W 72/073H10W 90/701H10W 90/00H10W 74/111H10W 70/688H10W 70/614H10W 70/09H10W 70/093H10W 74/016
48
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Claims

Abstract

A device including a semiconductor chip and method. One embodiment provides a method of manufacturing a module, including providing a first device having a first semiconductor chip and a plurality of first external contact elements electrically coupled to the first semiconductor chip. The method further includes providing a second device having a second semiconductor chip, a plurality of second external contact elements and a metal layer including a first face and a second face opposite to the first face, the first face of the metal layer facing the second semiconductor chip and the second face of the metal layer facing the plurality of second external contact elements. The first external contact elements are soldered to the first face of the metal layer.

Claims

exact text as granted — not AI-modified
1 . A method of manufacturing a module, comprising:
 providing a first device comprising a first semiconductor chip and a plurality of first external contact elements electrically coupled to the first semiconductor chip;   providing a second device comprising a second semiconductor chip, a plurality of second external contact elements and a metal layer comprising a first face and a second face opposite to the first face, the first face of the metal layer facing the second semiconductor chip and the second face of the metal layer facing the plurality of second external contact elements; and   soldering the first external contact elements to the first face of the metal layer.   
     
     
         2 . The method of  claim 1 , wherein the second device further comprises an encapsulation material covering the first face of the metal layer and the second semiconductor chip. 
     
     
         3 . The method of  claim 2 , wherein the encapsulation material comprises openings exposing the first face of the metal layer and configured to receive the first external contact elements. 
     
     
         4 . The method of  claim 1 , comprising wherein the first external contact elements are solder bumps. 
     
     
         5 . A method of making a device, comprising:
 providing a metal layer having a first layer face;   electrically coupling and placing at least one semiconductor chip over the metal layer with the first layer face facing a first chip face of the semiconductor chip;   covering the first layer face and the semiconductor chip with an encapsulation material; and   extending at least one through-hole through the encapsulation material, the at least one through-hole being open and unfilled and exposing a portion of the first layer face, and wherein the at least one through-hole and the portion of the metal layer exposed therein are physically accessible from outside the device.   
     
     
         6 . The method of  claim 5 , comprising defining the at least one through-hole to have a cross section of at least 3×10 4  μm 2 . 
     
     
         7 . The method of  claim 5 , further comprising:
 electrically coupling an array of solder bumps to a second layer face of the metal layer, the second layer face being opposite to the first layer face.   
     
     
         8 . The method of  claim 7 , comprising wherein a second layer face layer faces the solder bumps, the second layer face being opposite to the first layer face. 
     
     
         9 . The method of  claim 5 , further comprising:
 a second metal layer covering a second chip face of the semiconductor chip with a second metal layer; and covering the first layer face of the metal layer with a surface of the encapsulation material opposite a surface of the encapsulation material, the second chip face being opposite to the first chip face.   
     
     
         10 . The method of  claim 9 , comprising extending the at least one through-hole through the second metal layer as well as through the encapsulation material. 
     
     
         11 . The method of  claim 9 , comprising wherein a cross section of the at least one through-hole where it passes through the second metal layer is larger than a cross section of the through-hole where it passes through the encapsulation material. 
     
     
         12 . The method of  claim 9 , comprising arranging a first material between the second chip face and the second metal layer, the first material comprising silicone. 
     
     
         13 . The method of  claim 5 , comprising wherein the encapsulation material has an elastic modulus of less than 100 MPa. 
     
     
         14 . The method of  claim 5 , wherein the encapsulation material comprises silicone. 
     
     
         15 . The method of  claim 5 , comprising wherein the at least one through-hole has a cross section of at least 6×10 4  μm 2 . 
     
     
         16 . The method of  claim 5 , comprising extending the at least one through-hole in a direction orthogonal to the first layer face. 
     
     
         17 . The method of  claim 5 , comprising wherein the at least one through-hole has a length of at least 150 μm. 
     
     
         18 . The method of  claim 5 , including defining the semiconductor chip to include an array of contact elements arranged on the first chip face.

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