Signal routing Optimized IC package ball/pad layout

Abstract

This invention provides layout schemes for ball/pad regions on a printed circuit board for a small regular ball/pad region grid that provides additional space between ball/pad regions for increased wiring capability. The layout scheme is consistent with printed circuit board manufacturing requirements and minimum wiring channel requirements demanded by high density integrated circuit chips.

1 . A ball/pad region layout pattern, comprising:
 a circuit board for supporting circuit components and conductive circuit patterns, wherein said circuit board has a plurality of ball/pad regions;   an x-y grid for location of said ball/pad regions, wherein said x and y directions are perpendicular;   a reference line parallel to said y direction;   one or more first rows of conductive ball/pad regions formed on said circuit board wherein the centers of said ball/pad regions in said first rows are on a straight line parallel to said x direction, each said ball/pad region has a center, said centers of each of said ball/pad regions in each of said first rows are located one half of a first distance plus N multiplied by said first distance from said reference line, and wherein N is zero or a positive integer of one or greater; and   one or more second rows of conductive ball/pad regions formed on said circuit board wherein the centers of said ball/pad regions in said second rows are on a straight line parallel to said x direction, each said ball/pad region has a center, said centers of each of said ball/pad regions in each of said second rows are located M multiplied said first distance from said reference line, M is zero or a positive integer of one or greater, and wherein each said first row is adjacent to and a second distance from one of said second rows and each said second row is adjacent to and said second distance from one of said first rows and adjacent to and a third distance from one of said second rows.   
     
     
         2 . The ball/pad region layout of  claim 1  wherein said circuit components comprise integrated circuit devices. 
     
     
         3 . The ball/pad region layout of  claim 1  wherein said ball/pad regions are circular. 
     
     
         4 . The ball/pad region layout of  claim 1  wherein said first distance is about 0.5 millimeters. 
     
     
         5 . The ball/pad region layout of  claim 1  wherein said second distance is about 0.32 millimeters. 
     
     
         6 . The ball/pad region layout of  claim 1  wherein said third distance is about 0.4 millimeters. 
     
     
         7 . The ball/pad region layout of  claim 1  wherein there are two said first rows and two said second rows and said first and second rows are arranged consecutively in said y direction as one of said first rows, one of said second rows, one of said second rows, and one of said first rows. 
     
     
         8 . The ball/pad region layout of  claim 1  wherein said circuit board may have different regions with different said ball/pad layouts. 
     
     
         9 . The ball/pad region layout of  claim 1  wherein said circuit board is a printed circuit board. 
     
     
         10 . The ball/pad region layout of  claim 1  wherein said circuit board also has vias. 
     
     
         11 . A ball/pad region layout pattern, comprising:
 a circuit board for supporting circuit components and conductive circuit patterns, wherein said circuit board has a plurality of ball/pad regions;   an x-y grid for location of said ball/pad regions, wherein said x and y directions are perpendicular;   a reference line parallel to said y direction;   one or more first rows of conductive ball/pad regions formed on said circuit board wherein the centers of said ball/pad regions in said first rows are on a straight line parallel to said x direction, each said ball/pad region has a center, said centers of each of said ball/pad regions in each of said first rows are located N multiplied by a first distance from said reference line, and wherein N is positive integer of zero, one, or greater; and   one or more second rows of conductive ball/pad regions formed on said circuit board wherein the centers of said ball/pad regions in said second rows are on a straight line parallel to said x direction, each said ball/pad region has a center, said centers of each of said ball/pad regions in each of said second rows are located one half of said first distance plus M multiplied by said first distance from said reference line, wherein M is a positive integer of zero, one, or greater, and wherein each said first row is adjacent to and a second distance from at one or two of said second rows and each said second row is adjacent to and said second distance from one or two of said first rows.   
     
     
         12 . The ball/pad region layout of  claim 11  wherein said circuit components comprise integrated circuit devices. 
     
     
         13 . The ball/pad region layout of  claim 11  wherein said ball/pad regions are circular. 
     
     
         14 . The ball/pad region layout of  claim 11  wherein said first distance is about 0.5 millimeters. 
     
     
         15 . The ball/pad region layout of  claim 11  wherein said second distance is about 0.32 millimeters. 
     
     
         16 . The ball/pad region layout of  claim 11  wherein said first distance is about 0.58 millimeters and said second distance is about 0.29 mm. 
     
     
         17 . The ball/pad region layout of  claim 11  wherein there are two said first rows and two said second rows and said first and second rows are arranged consecutively in said y direction as one of said first rows, one of said second rows, one of said first rows, and one of said second rows. 
     
     
         18 . The ball/pad region layout of  claim 11  wherein said circuit board may have different regions with different said ball/pad layouts. 
     
     
         19 . The ball/pad region layout of  claim 11  wherein said circuit board is a printed circuit board. 
     
     
         20 . The ball/pad region layout of  claim 11  wherein said circuit board also has vias.