Semiconductor integrated circuit

Abstract

A semiconductor integrated circuit including an output pad from which an output signal is outputted, an output signal line connected with said output pad, a first pad configured to function as a ground terminal or a power supply terminal, a first wiring connected with said first pad, an output driver connected with said output pad and configured to generate said output signal, an ESD protection device connected with a output signal line and having a function to discharge surge applied to said output pad, a first trigger MOS transistor used as a trigger device, a first protection target device connected between said output signal line and a first interconnection, a first resistance element connected between a gate and a source of said first trigger MOS transistor, and a switching device.

1 . A semiconductor integrated circuit comprising:
 an output pad from which an output signal is outputted;   an output signal line connected with said output pad;   a first pad configured to function as a ground terminal or a power supply terminal;   a first wiring connected with said first pad;   an output driver connected with said output pad and configured to generate said output signal;   an ESD (electrostatic discharge) protection device connected with an output signal line and having a function to discharge surge applied to said output pad;   a first trigger MOS (metal-oxide semiconductor) transistor used as a trigger device;   a first protection target device connected between said output signal line and a first interconnection;   a first resistance element connected between a gate and a source of said first trigger MOS transistor; and   a switching device,   wherein a current flowing through said first protection target device is detected by use of said first resistance element,   wherein said ESD protection device comprises a bipolar transistor,   wherein said first pad comprises a VSS (voltage source-source, source or substrate supply voltage of a negative or ground potential) pad configured to function as a ground terminal,   wherein said first interconnection comprises a ground interconnection, and   wherein said first trigger MOS transistor is connected between said ground interconnection and a base of said bipolar transistor, and is turned on or off in response to a voltage generated in said first resistance element.   
     
     
         2 . The semiconductor integrated circuit according to  claim 1 , wherein said first trigger MOS transistor comprises an NMOS (n channel MOS) transistor, and
 wherein said first trigger MOS transistor is connected between an N gate and said ground line of a thyristor.   
     
     
         3 . The semiconductor integrated circuit according to  claim 2 , wherein said first protection target device comprises a protection target NMOS transistor including a drain connected with said output signal line and a source connected with said first resistance element, and
 wherein said first trigger MOS transistor has the drain connected with the N gate of said thyristor, a gate connected with a connection node between said first resistance element and the source of said protection target NMOS transistor, and a source connected to the ground line.   
     
     
         4 . The semiconductor integrated circuit according to  claim 1 , wherein said bipolar transistor comprises a parasitic bipolar transistor which is parasitic to said MOS transistor. 
     
     
         5 . The semiconductor integrated circuit according to  claim 4 , wherein said output driver comprises said MOS transistor. 
     
     
         6 . A semiconductor integrated circuit comprising:
 an output pad from which an output signal is outputted;   an output signal line connected with said output pad;   a first pad configured to function as a ground terminal or a power supply terminal;   a first wiring connected with said first pad;   an output driver connected with said output pad and configured to generate said output signal;   an ESD (electrostatic discharge) protection device connected with said output signal line and having a function to discharge surge applied to said output pad;   a first trigger MOS (metal-oxide semiconductor) transistor used as a trigger device;   a first protection target device connected between said output signal line and a first interconnection; and   a first resistance element connected between a gate and a source of said first trigger MOS transistor,   wherein a current flowing through said first protection target device is detected by use of said first resistance element,   wherein said ESD protection device comprises a thyristor,   wherein said first pad comprises a VSS (voltage source-source, source or substrate supply voltage of a negative or ground potential) pad configured to function as a ground terminal,   wherein said first interconnection comprises a ground interconnection, and   wherein said first trigger MOS transistor is connected between a P gate and said ground interconnection of said thyristor, and is turned on or off in response to the voltage generated in said first resistance element.