US2012252191A1PendingUtilityA1

Gallium nitride semiconductor device on soi and process for making same

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Assignee: BHAT RAJARAMPriority: Oct 18, 2007Filed: Jun 12, 2012Published: Oct 4, 2012
Est. expiryOct 18, 2027(~1.3 yrs left)· nominal 20-yr term from priority
H10W 10/181H10P 90/1916H10H 20/01335
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Claims

Abstract

Methods and apparatus for producing a gallium nitride semiconductor on insulator structure include: bonding a single crystal silicon layer to a transparent substrate; and growing a single crystal gallium nitride layer on the single crystal silicon layer.

Claims

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1 . A method of forming a semiconductor structure, comprising:
 bonding a single crystal silicon layer to a transparent substrate; and   growing a single crystal gallium nitride layer on the single crystal silicon layer.   
     
     
         2 . The method of  claim 1 , wherein the single crystal gallium nitride layer is grown using one or more of the following processes: organo-metallic vapor phase epitaxy, metal organic chemical vapor deposition, molecular beam epitaxy, hydride vapor phase epitaxy, and pulse laser deposition. 
     
     
         3 . The method of  claim 2 , further comprising elevating a temperature of the transparent substrate and the single crystal silicon layer bonded thereto to about 750° C. or higher when growing the single crystal gallium nitride layer on the single crystal silicon layer. 
     
     
         4 . The method of  claim 3 , wherein the temperature is about 1000° C. or higher. 
     
     
         5 . The apparatus of  claim 2 , wherein the single crystal gallium nitride layer is grown using pulsed laser deposition. 
     
     
         6 . The apparatus of  claim 5 , wherein the pulsed laser deposition is performed at a temperature of between about 25 to 700° C. 
     
     
         7 . The method of  claim 1 , further comprising forming the single crystal silicon layer using a plurality of single crystal silicon tiles such that one or more seams exist between one or more adjacent tiles. 
     
     
         8 . The method of  claim 7 , further comprising filling at least some of the seams between adjacent tiles by permitting at least some of the single crystal gallium nitride to at least partially fill such seams through lateral epitaxy. 
     
     
         9 . The method of  claim 1 , further comprising forming the single crystal silicon layer using a plurality of micron-sized single crystal silicon tiles. 
     
     
         10 . The method of  claim 1 , further comprising:
 subjecting an implantation surface of a donor single crystal silicon wafer to an ion implantation process to create an exfoliation layer of the donor semiconductor wafer;   bonding the implantation surface of the exfoliation layer to the transparent substrate using electrolysis;   separating the exfoliation layer from the donor silicon wafer to produce the single crystal silicon layer bonded to the transparent substrate.   
     
     
         11 . The method of  claim 10 , wherein the step of bonding includes:
 heating at least one of the transparent substrate and the donor silicon wafer;   bringing the transparent substrate into direct or indirect contact with the donor silicon wafer through the exfoliation layer; and   applying a voltage potential across the transparent substrate and the donor silicon wafer to induce the bond.   
     
     
         12 . The method of  claim 11 , further comprising maintaining the contact, heat, and voltage such that: (i) an oxide layer forms on the transparent substrate between the donor silicon wafer and the transparent substrate; and (ii) positive ions of the transparent substrate, including substantially all modifier positive ions, migrate away from the higher voltage potential of the donor silicon wafer, forming: (1) a reduced positive ion concentration layer in the transparent substrate adjacent the donor silicon wafer; and
 (2) an enhanced positive ion concentration layer of the transparent substrate adjacent the reduced positive ion concentration layer.

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