Pixel structure, display panel, electro-optical apparatus, and method thereof

Abstract

A pixel structure disposed on a substrate including a thin film transistor (TFT), a passivation layer, and a pixel electrode is provided. The TFT includes a gate, a dielectric layer, a channel layer, and a source/drain sequentially disposed on the substrate. The source/drain is disposed on a portion of the channel layer and has a semiconductor layer, a barrier layer and a metal layer. The barrier layer is disposed on a portion of the semiconductor layer. The metal layer is disposed on the barrier layer. The barrier layer is in contact with the semiconductor layer and the metal layer. Both of the metal layer and the barrier layer are positioned within a projection area of the semiconductor layer. The passivation layer covers the TFT and the dielectric layer and has a first opening exposing the source/drain. The pixel electrode is electrically connected to the TFT through the first opening.

1 . A pixel structure disposed on a substrate, the pixel structure comprising:
 a thin film transistor comprising:
 a gate disposed on the substrate; 
 a dielectric layer covering the gate; 
 a channel layer disposed on the dielectric layer and above the gate; and 
 a source and a drain disposed on a portion of the channel layer, the source and the drain each having a semiconductor layer, a barrier layer and a metal layer, wherein the barrier layer is located between and in contact with the semiconductor layer and the metal layer, the material of the metal layer comprises copper, a copper alloy, or a combination thereof, and both of the metal layer and the barrier layer are positioned within a projection area of the semiconductor layer; 
   a passivation layer covering the thin film transistor and having a first opening exposing the drain; and   a pixel electrode disposed on the passivation layer and electrically connected to the thin film transistor through the first opening.   
     
     
         2 . The pixel structure of  claim 1 , wherein the material of the barrier layer comprises copper oxide, and a composition comprising molybdenum, neodymium, zirconium, titanium, magnesium, nickel, hafnium, tungsten, tantalum, vanadium, tin, manganese, or combinations thereof. 
     
     
         3 . The pixel structure of  claim 1 , wherein the material of the barrier layer comprises copper oxide, in which the concentration of oxygen substantially ranges from 3% to 30%. 
     
     
         4 . The pixel structure of  claim 1 , wherein the thin film transistor further comprises an etching stop layer disposed above the channel layer. 
     
     
         5 . A method of manufacturing a pixel structure, the method comprising:
 providing a substrate;   forming a gate on the substrate;   forming a dielectric layer covering the gate;   forming a channel layer on the dielectric layer and above the gate;   forming a source and a drain on a portion of the channel layer such that the gate, the channel layer, the source and the drain form a thin film transistor, the source and the drain each having a semiconductor layer, a barrier layer and a metal layer, wherein the barrier layer is located between and in contact with the semiconductor layer and the metal layer, the material of the metal layer comprises copper, a copper alloy, or a combination thereof, and both of the metal layer and the barrier layer are positioned within a projection area of the semiconductor layer;   covering a passivation layer on the thin film transistor, wherein the passivation layer has a first opening exposing the drain; and   disposing a pixel electrode on the passivation layer, the pixel electrode electrically connected to the thin film transistor through the first opening.   
     
     
         6 . The method of manufacturing the pixel structure of  claim 5 , further comprising forming an etching stop layer on the channel layer before the step of forming the barrier layer. 
     
     
         7 . A display panel, comprising the pixel structure of  claim 1 . 
     
     
         8 . A method of manufacturing a display panel, comprising the method of manufacturing the pixel structure of  claim 5 . 
     
     
         9 . A method of manufacturing an electro-optical apparatus, comprising the method of manufacturing the pixel structure of  claim 8 .