Circuit board

Abstract

A circuit board includes a signal plane and a ground plane. The signal plane is configured to have a plurality of signal traces. Each of the signal traces includes a plurality of straight line segments. Each line segment extends along a path different from the others. The ground plane includes a plurality of tiles connected in an array. Each tile is formed by ground traces. The straight line segments of each signal trace mapped on the ground plane are arranged at an angle relative to any one ground trace of the tiles. The angle is defined within a range determined by one of ground traces of a tile and an adjacent diagonal line of the tile. A method for laying out such a circuit board is also provided.

1 . A circuit board, comprising:
 a signal plane with a plurality of signal traces, each of the plurality of signal traces comprising a plurality of straight line segments; and   a ground plane comprising a plurality of tiles connected in an array; each tile defined by ground traces, and the plurality of straight line segments mapped on the ground plane crossing one ground trace of one tile at an angle to minimize interaction between the ground traces and the signal traces and reduce impedance differences of the signal traces; the angle is defined within a range determined by the ground trace of the tile and an adjacent diagonal line of the tile; and the range is from 12.5° to 32.5°.   
     
     
         2 . The circuit board as described in  claim 1 , wherein the plurality of tiles are equilateral polygons of the same shape and size. 
     
     
         3 . The circuit board as described in  claim 2 , wherein the tiles of the ground plane are square. 
     
     
         4 . The circuit board as described in  claim 3 , wherein the plurality of straight line segments are arranged at about 0°, 45°, or 90° relative to determined sides of the circuit board. 
     
     
         5 . A circuit board, comprising:
 a substrate board having a plurality of board sides;   a reference ground plane having a plurality of ground trace tiles connected in an array, each of the plurality of ground trace tiles defined by a plurality of ground traces, any one ground trace of each tile consistent with an extension direction of one determined board side;   a ground plane below the substrate board;   a signal plane on the substrate board having a plurality of signal traces that comprises of a plurality of straight line segments arranged on the substrate board, the plurality of straight line segments mapped on the ground plane crossing one of the plurality of ground traces within a first angle range determined by one of the plurality of ground traces of one tile and an adjacent diagonal line of the one tile, so as to minimize interaction between the ground traces and the signal traces and reduce impedance differences of the signal traces;   wherein a second angle range defined between the reference ground plane and the one determined board side is from 12.5° to 32.5°; and an angle defined between the reference ground plane and the one determined board side is 22.5°.   
     
     
         6 . The circuit board as described in  claim 5 , wherein the first angle range is from 12.5° to 32.5°. 
     
     
         7 . The circuit board as described in  claim 5 , wherein the plurality of ground trace tiles of the ground plane in a square array or a rectangular array. 
     
     
         8 . A circuit board, comprising:
 a substrate board having a plurality of board sides;   a reference ground plane having a plurality of tiles connected in an array, each ground trace tile defined by a plurality of ground traces, each ground trace being wavy;   a ground plane below the substrate board;   a signal plane on the substrate board having a plurality of signal traces that comprises of a plurality of straight line segments arranged on the substrate board, the plurality of straight line segments mapped on the ground plane crossing one of the plurality of ground traces within a first angle range determined by one the plurality of ground traces of one tile and an adjacent diagonal line of the one tile, so as to minimize interaction between the ground traces and the signal traces and reduce impedance differences of the signal traces.