Semiconductor Device and Method of Controlling the Same
Abstract
A pull-up circuit prevents generation of a leak current if a difference of potentials occurs between a power source voltage of a pull-up circuit (a bus-hold circuit) and an input terminal. A control terminal is provided in the bus-hold circuit. Inputs of the input terminal and the control terminal are input to a NOR gate, and an output of the NOR gate is input to a gate terminal of a first MOSFET that controls coupling between an input terminal and the power source voltage of the bus-hold circuit. A second MOSFET (“control” MOSFET) is provided as a switch that operates by an inverted output of the control terminal. By coupling the first MOSFET and the control MOSFET in series, the coupling between the input terminal and the power source voltage is controlled with a higher precision, thereby preventing generation of a leak current.
Claims
exact text as granted — not AI-modified1 . A semiconductor device comprising:
an input terminal for receiving an input signal; a control terminal for receiving a control signal; a first MOSFET; a control MOSFET; and an inverter for outputting an inverted signal of the input signal, wherein: the first MOSFET and the control MOSFET are coupled in series between a power source voltage and the input terminal; an inverted signal of the output of the inverter is input to a gate terminal of the first MOSFET; and the control signal is input to a gate terminal of the control MOSFET.
2 . The semiconductor device according to claim 1 , wherein an output of the inverter is used as an output of the semiconductor device.
3 . The semiconductor device according to claim 1 , wherein the input terminal is coupled to a source or drain of one of the MOSFETs.
4 . The semiconductor device according to claim 3 , wherein the input terminal is coupled to a source or drain of the first MOSFET.
5 . The semiconductor device according to claim 1 , wherein the first MOSFET and the control MOSFET are p-channel MOSFETs.
6 . The semiconductor device according to claim 1 , wherein all MOSFETs are p-channel MOSFETs.
7 . The semiconductor device according to claim 1 , further comprising:
a voltage-adjusting MOSFET used for adjusting a voltage of the input signal electrically coupled immediately after the input terminal.
8 . The semiconductor device according to claim 2 , further comprising:
a voltage-adjusting MOSFET used for adjusting a voltage of the input signal electrically coupled immediately after the input terminal.
9 . The semiconductor device according to claim 3 , further comprising:
a voltage-adjusting MOSFET used for adjusting a voltage of the input signal electrically coupled immediately after the input terminal.
10 . The semiconductor device according to claim 4 , further comprising:
a voltage-adjusting MOSFET used for adjusting a voltage of the input signal electrically coupled immediately after the input terminal.
11 . The semiconductor device according to claim 5 , further comprising:
a voltage-adjusting MOSFET used for adjusting a voltage of the input signal electrically coupled immediately after the input terminal.
12 . The semiconductor device according to claim 6 , further comprising:
a voltage-adjusting MOSFET used for adjusting a voltage of the input signal electrically coupled immediately after the input terminal.
13 . The semiconductor device according to claim 1 , wherein:
an output of the inverter is used as an output of the semiconductor device; the input terminal is coupled to a source or drain of one of the MOSFETs; the first MOSFET and the control MOSFET are p-channel MOSFETs.
14 . The semiconductor device according to claim 13 , further comprising:
a voltage-adjusting MOSFET used for adjusting a voltage of the input signal electrically coupled immediately after the input terminal.
15 . The semiconductor device according to claim 14 , wherein all MOSFETs are p-channel MOSFETs.
16 . The semiconductor device according to claim 13 , wherein all MOSFETs are p-channel MOSFETs.Cited by (0)
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