Semiconductor device and method for fabricating the same
Abstract
A semiconductor device has an FET of a trench-gate structure obtained by disposing a conductive layer, which will be a gate, in a trench extended in the main surface of a semiconductor substrate, wherein the upper surface of the trench-gate conductive layer is formed equal to or higher than the main surface of the semiconductor substrate. The conductive layer of the trench gate is formed to have a substantially flat or concave upper surface and the upper surface is formed equal to or higher than the main surface of the semiconductor substrate. After etching of the semiconductor substrate to form the upper surface of the conductive layer of the trench gate, a channel region and a source region are formed by ion implantation so that the semiconductor device is free from occurrence of a source offset.
Claims
exact text as granted — not AI-modified1 . A method of manufacturing a semiconductor device including a MISFET, comprising steps of:
(a) providing a semiconductor substrate of a first conductive type; (b) forming a first trench in the semiconductor substrate; (c) forming a first insulating film as a gate insulating film of the MISFET over of the first trench; (d) embedding a first conductive film as a gate electrode of the MISFET in the first trench via the first insulating film; (e) forming a first impurity region of a second conductive type being opposite to the first conductive type in the semiconductor substrate, wherein a depth of the first impurity region is shallower than a depth of the first trench; (f) forming a second impurity region of the first conductive type in the semiconductor substrate, wherein a depth of the second impurity region is shallower than the depth of the first impurity region; (g) forming a second insulating film over the second impurity region; (h) forming a second trench by etching the second insulating film and the semiconductor substrate, wherein the second trench penetrates the second impurity region and reach at the first semiconductor impurity region, and wherein a depth of the second trench is shallower than a depth of the first trench; (i) forming a third impurity region of the second conductive type in the first impurity region located at a bottom of the second trench, wherein an impurity concentration of the third impurity region is higher than an impurity concentration of the first impurity region; (j) after the step (i), recessing the second insulating film, thereby a part of a surface of the second impurity region is exposed; and (k) after the step (j), forming a second conductive film in the second trench, wherein the second conductive film is electrically connected with the exposed surface of the second impurity region outside of the second trench and is electrically connected with the first, second and third impurity regions inside of the second trench.
2 . A method of manufacturing a semiconductor device according to the claim 1 ,
wherein the first conductive type is an N type, and wherein the second conductive type is a P type.
3 . A method of manufacturing a semiconductor device according to the claim 2 ,
wherein the first conductive film includes a polysilicon film.
4 . A method of manufacturing a semiconductor device according to the claim 3 ,
wherein the second insulating film includes a silicon oxide film.
5 . A method of manufacturing a semiconductor device according to the claim 4 ,
wherein a cap film is formed between a top surface of the first conductive film and the second insulating film.Cited by (0)
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