Nonvolatile memory devices having improved read reliability

Abstract

Memory systems include at least one nonvolatile memory array having a plurality of rows of nonvolatile multi-bit (e.g., N-bit, where N>2) memory cells therein. A control circuit is also provided, which is electrically coupled to the nonvolatile memory array. The control circuit is configured to program at least two pages of data into a first row of nonvolatile multi-bit memory cells in the nonvolatile memory array using a first sequence of read voltages to verify accuracy of the data stored within the first row. The control circuit is also configured to read the at least two pages of data from the first row using a second sequence of read voltages that is different from the first sequence of read voltages. Each of the read voltages in the first sequence of read voltages may be equivalent in magnitude to a corresponding read voltage in the second sequence of read voltages.

1 . A method of programming multi-bit data in a nonvolatile memory cell array, the method comprising:
 gathering full page data to be stored in selected memory cells in a row of the nonvolatile memory cell array;   converting the full page data into converted data having different binary values relative to the full page data; and   storing the full page data in the selected memory cells using the converted data by performing at least two or more program sequences.   
     
     
         2 . The method of  claim 1 , wherein the full page data stored in the selected memory cells is read according to a reading operation with a uniform read latency. 
     
     
         3 . The method of  claim 1 , wherein the full page data has a first state ordering of bit patterns, and the converted data has a second state ordering of bit patterns. 
     
     
         4 . The method of  claim 3 , wherein the full page data is stored in the selected memory cells using the converted data having the second state ordering of bit patterns by performing three program sequences. 
     
     
         5 . The method of  claim 4 , further comprising:
 reading the full page data stored in the selected memory cells according to a read operation corresponding to the first state ordering of the bit patterns.   
     
     
         6 . The method of  claim 1 , wherein the full page data comprise first, second, and third page data. 
     
     
         7 . The method of  claim 1 , wherein:
 the performing the at least two or more program sequences comprises performing a first program sequence with a first program state and preforming a second program sequence with at least two second program states; and   the first program state of the first program sequence is disposed between the at least two second program states of the second program sequence.   
     
     
         8 . The method of  claim 1 , wherein:
 the performing the at least two or more program sequences comprises performing a first program sequence and performing a next program sequence; and   the first program sequence includes a number of program states, and the number of program states of the first program sequence is less than the number of program states of the next program sequence.   
     
     
         9 . The method of  claim 8 , wherein:
 the program states of the first program sequence comprise an utmost program state having a threshold voltage distribution lower than a threshold voltage of an utmost program state of the next program sequence.   
     
     
         10 . The method of  claim 1 , wherein:
 the full page data stored in the selected memory cells comprises a plurality of pages;   each page of the plurality of the pages is read according to one or more corresponding reading operations;   the number of the corresponding reading operation for each page is different from that for one or more other pages; and   a difference between the numbers of the corresponding read operations is equal to or less than 1.   
     
     
         11 . The method of  claim 1 , wherein the full page data to be stored in the selected memory cells are retained in a buffer until the storing the converted data is completed. 
     
     
         12 . The method of  claim 1 , wherein the performing of the at least two or more program sequences in the storing of the full page data in the selected memory cells comprises performing three program sequences. 
     
     
         13 . The method of  claim 12 , wherein the performing of the three program sequences comprises:
 gathering the full page data,   converting the full page data into first converted data,   storing the first full page data using the first converted data according to a first program sequence,   gathering the full page data again;   storing the full page data according to a second program sequence,   gathering the full page data again, and   storing the full page data according to a third program sequence.   
     
     
         14 . A programming method of a nonvolatile memory device, the method comprising:
 gathering data of a plurality of pages to be stored in the multi-bit memory cells in a row of the nonvolatile memory cell array; and   storing the data with a plurality of program sequences,   wherein at least one program sequence of the plurality of program sequences comprises converting the data corresponding to each of the multi-bit memory cells into converted data having different binary values from binary values of the data and programming the converted data in the multi-bit memory cells, and   wherein an increment of threshold voltages in every state within each program sequence of the plurality of the program sequences is uniform.   
     
     
         15 . The program method of  claim 14 , wherein the converted data are variable at least two of the respective program sequences. 
     
     
         16 . The program method of  claim 14 , wherein the converted data are same in the program sequences. 
     
     
         17 . A programming method of a nonvolatile memory device, the method comprising:
 gathering data of a plurality of pages to be stored in the multi-bit memory cells in a row of the nonvolatile memory cell array;   storing the data with a plurality of program sequences,   wherein at least one program sequence of the plurality of program sequences comprises converting the data corresponding to each of the multi-bit memory cells into converted data having different binary values from binary values of the data and programming the data using the converted data in the multi-bit memory cells such that the data programmed in the multi-bit memory cells are read according to a number of reading operations,   wherein a state ordering of bit patterns of the data programmed in the multi-bit memory cells includes performing a number of the reading operations at each page such that a difference among numbers of the reading operations is not greater than 1.   
     
     
         18 . A nonvolatile memory system, comprising:
 a nonvolatile memory having a nonvolatile memory cells; and   a controller configured to receive full pages of data in a data buffer, to convert the full pages of data stored in the data buffer into full pages of converted data having different binary values relative to the full pages of data, and to store the full pages of converted data in selected memory cells in a row of the memory cell array by performing at least two or more program sequences.   
     
     
         19 . The nonvolatile memory system of  claim 18 , wherein the nonvolatile memory cells have a cell structure having a flash structure without a source-drain. 
     
     
         20 . The nonvolatile memory system of  claim 18 , wherein the nonvolatile memory cells have a cell structure having a charge trap flash structure using a charge trap layer. 
     
     
         21 . The memory device of  claim 20 , wherein the cell structure comprises a three dimensional array structure. 
     
     
         22 . The memory device of  claim 18 , wherein:
 the controller receives host data from an external host and to convert the host data; and   the nonvolatile memory comprises a voltage generator and a control logic to receive the converted data from the controller and to control the voltage generator such that the received data is programmed and the programmed data is read according to different arrangements of different voltage sets corresponding to full pages of the data.   
     
     
         23 . The memory device of  claim 18 , wherein:
 the controller gathers the full pages of data in the data buffer each time when the nonvolatile memory stores a portion of the full pages of the converted data by performing a corresponding one of the at least two or more program sequences.   
     
     
         24 . A nonvolatile memory device comprising:
 the non-volatile memory device having a memory cell array having nonvolatile memory cells, and configured to gather full pages of data in a data buffer, to convert the full pages of data stored in the data buffer into converted data having different binary values relative to the full pages of data, and to store the converted data in selected memory cells in a row of the memory cell array by performing at least two or more program sequences.   
     
     
         25 . A method of programming multi-bit data in a nonvolatile memory cell array, the method comprising:
 gathering full page data to be stored in selected memory cells in a row of the nonvolatile memory cell array;   converting the full page data into first data having different binary values relative to the full page data;   storing the first data in the selected memory cells by performing a first program sequence;   gathering the full page data when the first data is stored;   storing second data of the full page data in the selected memory cells by performing a second program sequence;   gathering the full page data when the second data is stored; and   storing third data of the full page data according to a third program sequence,   wherein a number of program states of the first program sequence is less than a number of program states of the second program sequence, and the number of program states of the second program sequences is equal to or less than a number of program states of the third program sequence, and   wherein a threshold voltage distribution of an utmost program state of the program states of the first program sequence is lower than a threshold voltage of an utmost program state of the program states of the second program sequence, and the threshold voltage distribution of the utmost program state of the second program sequence is lower than a threshold voltage of an utmost program state of the program states of the third program sequence.   
     
     
         26 . A method of programming multi-bit data in a nonvolatile memory cell array, the method comprising:
 gathering full page data to be stored in selected memory cells in a row of the nonvolatile memory cell array;   converting the full page data into first data having different binary values relative to the full page data;   storing the first data in the selected memory cells by performing a first program sequence;   gathering the full page data when first data is stored;   storing second data of the full page data in the selected memory cells by performing a second program sequence;   gathering the full page data when the second data is stored; and   storing third data of the full page data in the selected memory cells according to a third program sequence,   wherein the full page data stored in the selected memory cells are read according to a number of reading operations, and   wherein the full page data is stored in the selected memory cells according to a state ordering of bit patterns, and the reading of the stored full page data includes performing the number of the reading operations at each page such that a difference among numbers of the reading operations is not greater than 1.