Semiconductor device and process for producing the same

Abstract

A trench gate transistor whose gate changes depth intermittently in the gate width direction, has a first offset region and a second offset region formed below the source and drain, respectively. The first offset region and the second offset region are shallower where they contact the device isolation film than is the device isolation film in those areas. The first and second offset regions nevertheless extend below the bottom of the trench.

1 . A semiconductor device comprising:
 a device isolation film formed in a substrate and having a first depth in the substrate;   a source region and a drain region, both of which are of a first conductivity type and arranged in the substrate;   a channel region of a second conductivity type arranged, in the substrate, in a first direction between the source region and the drain region;   a first low-concentration region of the first conductivity type formed in the substrate between the source region and the channel region and having a first conductivity type dopant concentration lower than a first conductivity type dopant concentration of the source region;   a second low-concentration region of the first conductivity type formed in the substrate between the drain region and the channel region and having a first conductivity type dopant concentration lower than a first conductivity type dopant concentration of the drain region,   a trench formed in the substrate between the first low-concentration region and the second low-concentration region and having a side surface extending in the first direction between the first low-concentration region and the second low-concentration region;   a gate insulating film formed in the trench; and   a gate electrode formed in the trench through the gate insulating film and having a second depth in the substrate,   wherein the first low-concentration region includes a first portion extending in said substrate, having a third depth shallower than the first depth of the device isolation film and contacting, in the second direction, the device isolation film at a depth shallower than the first depth of the device isolation film,   wherein the first low-concentration region includes a second portion extending in said substrate and having a fourth depth greater than the third depth and the second depth such that the first portion is arranged, in the second direction, between the device isolation film and the second portion and such that the channel region is arranged, in the first direction, between the second portion and the second low-concentration region.   
     
     
         2 . The semiconductor device according to  claim 1 ,
 wherein the second low-concentration region includes a third portion extending in said substrate, having a fifth depth shallower than the first depth of the device isolation film and contacting, in the second direction, the device isolation film at a depth shallower than the first depth of the device isolation film,   wherein the second low-concentration region includes a fourth portion extending in said substrate and having a sixth depth greater than the fourth depth and the second depth such that the fourth portion is arranged, in the second direction, between the device isolation film and the third portion and such that the channel region is arranged, in the first direction, between the second portion and the fourth portion.   
     
     
         3 . The semiconductor device according to  claim 1 ,
 wherein the second depth of the gate electrode serves as a gate width such that a portion of the channel region sideward, in a second direction crossing the first direction, from the side surface of the trench is arranged between the first low-concentration region and the second low-concentration region.   
     
     
         4 . The semiconductor device according to  claim 1 , wherein a plurality of trenches are formed along the second direction. 
     
     
         5 . The semiconductor device according to  claim 1 ,
 wherein the second portion contacts the trench and extends below a lower corner of the trench.   
     
     
         6 . The semiconductor device according to  claim 1 ,
 wherein a source-drain current path is arranged, in the first direction between the first low-concentration region and the second low-concentration region, along the portion of the channel region sideward, in a second direction, from the side surface of the trench.