Planarized sacrificial layer for mems fabrication

Abstract

A method of forming a device is provided. The method includes providing a substrate, forming a sacrificial layer over the substrate, and forming a field layer around the sacrificial layer. After formation, both the sacrificial layer and the field layer are planarized. A component is then formed over the planarized sacrificial layer and the planarized field layer. The component has a first electrode and a second electrode and a single crystal wafer disposed between the first and second electrodes. The component includes anchors disposed substantially over the field layer. Once the component is formed, the sacrificial layer is released with an etchant having a selectivity for the sacrificial layer wherein a cavity is formed beneath the component. The cavity allows free movement within the cavity during operation of the device. The etchant does not release the field layer and the component so the field layer remains below the anchors.

1 . A method of forming a device comprising:
 providing a substrate;   forming a sacrificial layer over the substrate;   forming an field layer around the sacrificial layer;   planarizing the sacrificial layer and the field layer;   forming a component over the planarized sacrificial layer and the planarized field layer, the component having a first electrode and a second electrode and a single crystal wafer disposed between the first electrode and the second electrode, wherein the component includes anchors disposed substantially over the field layer; and   releasing the sacrificial layer with an etchant having a selectivity for the sacrificial layer, thereby forming a cavity beneath the component, where the component freely moves within the cavity during operation of the device, wherein the etchant does not release the field layer and the component such that the field layer remains below the anchors.   
     
     
         2 . The method of  claim 1 , wherein the single crystal wafer is a piezoelectric material. 
     
     
         3 . The method of  claim 2 , wherein the single crystal wafer is lithium tantalate. 
     
     
         4 . The method of  claim 2 , wherein the single crystal wafer is lithium niobate. 
     
     
         5 . The method of  claim 1 , wherein the second electrode functions as a hard mask during the formation of the component. 
     
     
         6 . The method of  claim 5 , wherein the step of forming the component further comprises patterning the first electrode and the single crystal wafer such that the first electrode and the single crystal wafer are self-aligned. 
     
     
         7 . The method of  claim 1 , wherein the field layer is formed from a material different from the sacrificial layer. 
     
     
         8 . The method of  claim 1 , wherein the first electrode and the second electrode are formed from a material different from the sacrificial layer. 
     
     
         9 . The method of  claim 1 , wherein the sacrificial material is Silicon. 
     
     
         10 . The method of  claim 9 , wherein the first electrode and the second electrode are formed from Chromium. 
     
     
         11 . The method of  claim 10 , wherein the etchant is Xenon Difluoride (XeF 2 ). 
     
     
         12 . The method of  claim 1 , wherein the field layer is an oxide layer. 
     
     
         13 . The method of  claim 1 , wherein the sacrificial material is Silicon. 
     
     
         14 . The method of  claim 13 , wherein the first electrode and the second electrode are formed from Gold. 
     
     
         15 . The method of  claim 14 , wherein the etchant is Potassium Hydroxide (KOH). 
     
     
         16 . The method of  claim 1 , wherein the sacrificial material is Aluminum. 
     
     
         17 . The method of  claim 16 , wherein the first electrode and the second electrode are formed from Chromium. 
     
     
         18 . The method of  claim 17 , wherein the etchant is dilute aqua regia. 
     
     
         19 . A method of forming a device comprising:
 providing a substrate;   forming a field layer over the substrate;   forming a sacrificial layer over the field layer;   planarizing the sacrificial layer and the field layer;   forming a component over the planarized sacrificial layer and the planarized field layer, the component having a first electrode and a second electrode and a single crystal wafer disposed between the first electrode and the second electrode, wherein the component includes anchors disposed substantially over the field layer; and   releasing the sacrificial layer with an etchant having a selectivity for the sacrificial layer, thereby forming a cavity beneath the component, where the component freely moves within the cavity during operation of the device, wherein the etchant does not release the field layer and the component such that the field layer remains below the anchors.   
     
     
         20 . The method of  claim 19 , wherein the field layer is an oxide layer. 
     
     
         21 . The method of  claim 19 , further comprising:
 patterning the sacrificial layer;   etching the sacrificial layer;   forming an additional field layer over the patterned sacrificial layer, wherein the additional field layer contacts both the patterned sacrificial layer and the field layer; and   planarizing both the patterned sacrificial layer and the additional field layer.   
     
     
         22 . The method of  claim 21 , further comprising:
 patterning and etching the field layer such that a cavity is formed within the field layer.   
     
     
         23 . The method of  claim 22 , wherein the sacrificial layer is formed over the field layer such that a portion of the sacrificial layer is deposited within the field layer cavity. 
     
     
         24 . The method of  claim 19 , wherein the single crystal wafer is a piezoelectric material. 
     
     
         25 . The method of  claim 19 , wherein the second electrode functions as a hard mask during the formation of the component. 
     
     
         26 . The method of  claim 25 , wherein the step of forming the component further comprises patterning the first electrode and the single crystal wafer such that the first electrode and the single crystal wafer are self-aligned. 
     
     
         27 . The method of  claim 19 , wherein the field layer is formed from a material different from the sacrificial layer. 
     
     
         28 . The method of  claim 19 , wherein the first electrode and the second electrode are formed from a material different from the sacrificial layer. 
     
     
         29 . The method of  claim 19 , wherein the sacrificial material is silicon. 
     
     
         30 . The method of  claim 29 , wherein the first electrode and the second electrode are formed from gold. 
     
     
         31 . The method of  claim 30 , wherein the etchant is Potassium Hydroxide (KOH). 
     
     
         32 . The method of  claim 19 , further comprising:
 patterning and etching the field layer, thereby forming a cavity in the field layer, wherein the sacrificial layer is deposited over the field layer and within the field layer cavity.