Method for making semiconductor device

Abstract

One or more embodiments relate to a method for forming a memory device, the memory device including a control gate, a charge storage structure and a select gate, the method comprising: forming a gate tower, the gate tower including the control gate over the charge storage structure; forming a dummy tower laterally spaced apart from the gate tower; and forming a select gate between the gate tower and the dummy tower.

1 . A method for forming a memory device, said memory device including a control gate, a charge storage structure and a select gate, said method comprising:
 forming a gate tower, said gate tower including said control gate over said charge storage structure;   forming a dummy tower laterally spaced apart from said gate tower; and   forming a select gate between said gate tower and said dummy tower.   
     
     
         2 . The method of  claim 1 , wherein said forming said select gate comprise forming an additional gate layer at least between said gate tower and said dummy tower. 
     
     
         3 . The method of  claim 2 , wherein said forming said select gate further comprises removing a portion of said additional gate layer. 
     
     
         4 . The method of  claim 2 , wherein said additional gate layer comprises doped polysilicon. 
     
     
         5 . The method of  claim 1 , wherein said gate tower and said dummy tower are formed at the same time. 
     
     
         6 . A method for forming a memory device, said memory device including a control gate, a charge storage structure and a select gate, said method comprising:
 forming a gate tower, said gate tower including said control gate over said charge storage structure;   forming a dummy tower laterally spaced apart from said gate tower; and   forming a conductive layer at least between said gate tower and said dummy tower.   
     
     
         7 . The method of  claim 6 , further comprising forming a select gate, said forming said select gate including removing a portion of said conductive layer. 
     
     
         8 . The method of  claim 6 , wherein said conductive layer comprises polysilicon. 
     
     
         9 . The method of  claim 6 , wherein said polysilicon is doped polysilicon. 
     
     
         10 . The method of  claim 6 , wherein said gate tower and said dummy tower are formed at the same time.