US2013029440A1PendingUtilityA1

Method for fabricating semiconductor light-emitting device

Assignee: EPISTAR CORPPriority: Mar 27, 2006Filed: Oct 1, 2012Published: Jan 31, 2013
Est. expiryMar 27, 2026(expired)· nominal 20-yr term from priority
H10H 20/82H10H 20/817
52
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Claims

Abstract

A semiconductor light-emitting device is disclosed. The semiconductor light-emitting device comprises a multilayer epitaxial structure disposed on a substrate. The substrate has a predetermined lattice direction perpendicular to an upper surface thereof, wherein the predetermined lattice direction is angled toward [0 1 1] or [01 1 ] from [100], or toward [011] or [0 11 ] from [ 1 00] so that the upper surface of the substrate comprises at least two lattice planes with different lattice plane directions. The multilayer epitaxial structure has a roughened upper surface perpendicular to the predetermined lattice direction. The invention also discloses a method for fabricating a semiconductor light-emitting device.

Claims

exact text as granted — not AI-modified
1 . A manufacturing method of a semiconductor light-emitting device, comprising:
 providing a substrate having an upper surface with a predetermined direction perpendicular to the upper surface thereof, wherein the predetermined direction is selected from a group consisting of directions toward [0  1 1] with a first angle from [100], [01  1 ] with the first angle from [100], [011] with a second angle from [  1 00], and [0  11 ] with the second angle from [  1 00], wherein the first or the second angle is between 6° and 55°; and   forming a multilayer epitaxial structure on the upper surface, wherein the multilayer epitaxial structure has a rough upper surface substantially perpendicular to the predetermined direction and wherein the upper surfaces of the multilayer epitaxial structure and the substrate have substantially the same surface topography.   
     
     
         2 . The manufacturing method as claimed in  claim 1 , further comprising roughening the upper surface of the multilayer epitaxial structure. 
     
     
         3 . The manufacturing method as claimed in  claim 1 , wherein the multilayer epitaxial structure comprises an n-type semiconductor layer, a p-type semiconductor layer and an active layer interposed therebetween. 
     
     
         4 . The manufacturing method as claimed in  claim 1 , wherein the predetermined direction is defined by having a group III atom located at the [000] position of the coordinate of the unit cell as the origin. 
     
     
         5 . The manufacturing method as claimed in  claim 1 , wherein the first angle or the second angle is 15°. 
     
     
         6 . The manufacturing method as claimed in  claim 1 , wherein the roughened upper surface of the multilayer epitaxial structure has a roughening depth not less than 0.05 μm. 
     
     
         7 . The manufacturing method as claimed in  claim 1 , wherein the roughened upper surface of the multilayer epitaxial structure has a roughening depth between 0.05 μm and 1 μm. 
     
     
         8 . The manufacturing method as claimed in  claim 2 , wherein the step of roughening the upper surface of the multilayer epitaxial structure is performed by wet etching using HCl and/or H 3 PO 4  as an etchant. 
     
     
         9 . The manufacturing method as claimed in  claim 2 , wherein the step of roughening the upper surface of the multilayer epitaxial structure is performed by dry etching. 
     
     
         10 . The manufacturing method as claimed in  claim 1 , wherein the whole upper surface is generally extending along a horizontal direction. 
     
     
         11 . The manufacturing method as claimed in  claim 1 , wherein the upper surface comprises at least two lattice planes with different lattice plane directions. 
     
     
         12 . The manufacturing method as claimed in  claim 11 , wherein the predetermined direction is different from the lattice plane directions.

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