Voltage regulator circuit

Abstract

One embodiment of the invention includes a regulator circuit that regulates a substantially constant magnitude of an output voltage at an output node. The circuit includes a master stage configured to set a first threshold voltage and a second threshold voltage. The first threshold voltage can have a magnitude that is greater than the second threshold voltage. The circuit also includes a charging follower stage configured to conduct a first current from a first power rail to the output node. The first current can increase in response to a transient decrease of the output voltage relative to the first threshold voltage. The circuit further includes a discharging follower stage configured to conduct a second current from the output node to a second power rail. The second current can increase in response to a transient increase of the output voltage relative to the second threshold voltage.

1 . A method for regulating a substantially constant magnitude of an output voltage at an output node, the method comprising:
 generating a bias current via a current source;   mirroring the bias current via at least one current-mirror to set a first threshold voltage and a second threshold voltage, the first threshold voltage having a magnitude that is greater than the second threshold voltage;   setting a first current from a first power rail to the output node based on the first threshold voltage;   setting a second current from the output node to a second power rail, the first and second currents having substantially equal magnitudes during a steady-state condition;   increasing a magnitude of the first current in response to a transient decrease of the output voltage relative to the first threshold voltage; and   increasing a magnitude of second current in response to a transient increase of the output voltage relative to the second threshold voltage.   
     
     
         2 . The method of  claim 1 , further comprising:
 setting the first threshold voltage at a gate of at least one first transistor current source in response to the mirrored bias current; and   setting the second threshold voltage at a gate of at least one second transistor current source in response to the mirrored bias current, the output node being coupled to sources of each of the at least one first and second transistor current sources;   wherein increasing the magnitude of the first current comprises increasing the magnitude of the first current in response to an increase in a gate-source voltage of the at least one first transistor current source and increasing the magnitude of the second current comprises increasing the magnitude of the second current in response to an increase in a source-gate voltage of the at least one second transistor current source.   
     
     
         3 . The method of  claim 1 , wherein setting the first current comprises conducting a plurality of portions of the first current through each of a respective plurality of current sources, wherein increasing the first current comprises increasing the first current by a first current magnitude in response to a transient decrease of the output voltage by a first voltage magnitude, and wherein increasing the second current comprises increasing the second current by a second current magnitude in response to a transient increase of the output voltage by the first voltage magnitude, the first current magnitude being greater than the second current magnitude. 
     
     
         4 . The method of  claim 1 , wherein setting the second current comprises conducting a plurality of portions of the second current through each of a respective plurality of current sources, wherein increasing the second current comprises increasing the second current by a first current magnitude in response to a transient increase of the output voltage by a first voltage magnitude, and wherein increasing the first current comprises increasing the first current by a second current magnitude in response to a transient decrease of the output voltage by the first voltage magnitude, the first current magnitude being greater than the second current magnitude. 
     
     
         5 . The method of  claim 1 , wherein the at least one current-mirror comprises a plurality of current-mirrors, wherein mirroring the bias current comprises:
 mirroring the bias current through an amplifier via a first of the plurality of current-mirrors;   setting a gate-source voltage of a pair of transistors in a second of the plurality of current-mirrors at an output of the amplifier; and   setting the first and second threshold voltages based on the gate-source voltages of the pair of transistors.   
     
     
         6 . A regulator circuit that regulates a substantially constant magnitude of an output voltage at an output node, the circuit comprising:
 means for amplifying a reference voltage based on a bias current to generate an amplified voltage, the amplified voltage having a substantially constant magnitude that is approximately equal to the output voltage;   means for setting a first threshold voltage and a second threshold voltage based on the amplified voltage, the first threshold voltage having a magnitude that is greater than the amplified voltage and the second threshold voltage having a magnitude that is less than the amplified voltage;   means for sourcing current to the output node from a first power rail in response to a transient decrease of the output voltage relative to the first threshold voltage; and   means for sinking current from the output node to a second power rail in response to a transient increase of the output voltage relative to the second threshold voltage.   
     
     
         7 . The circuit of  claim 6 , wherein one of the means for sourcing and the means for sinking comprises plural means for conducting current that collectively conduct a greater magnitude of current than the other of the means for sourcing and the means for sinking in response to a substantially equal transient decrease or increase, respectively, of the output voltage relative to the respective one of the first and second threshold voltage. 
     
     
         8 . The circuit of  claim 6 , further comprising plural means for mirroring the bias current, a first of the plural means for mirroring being coupled to a first current path that comprises the means for amplifying and a second of the plural means for mirroring being coupled to a second current path, the second current path comprising means for setting the first threshold voltage based on an output of the means for amplifying and means for setting the second threshold voltage based on the output of the means for amplifying.