Semiconductor device and method of making same

Abstract

In a semiconductor device and a method of making the same, a first transistor has a gate stack comprising an underlying layer formed of a first material and an overlying layer formed of a second material. A second transistor has a gate stack comprising an underlying layer formed of a third material and an overlying layer formed of the second material. A third transistor has a gate stack comprising an underlying layer formed of the first material and an overlying layer formed of a fourth material. A fourth transistor has a gate stack comprising an underlying layer formed of the third material and an overlying material formed of the fourth material. Each of the first through fourth materials has a respectively different work function, so that each of the first through fourth transistors has a respectively different threshold voltage.

1 . A semiconductor device comprising:
 a first transistor having a gate stack comprising an underlying layer formed of a first material and an overlying layer formed of a second material;   a second transistor having a gate stack comprising an underlying layer formed of a third material and an overlying layer formed of said second material;   a third transistor having a gate stack comprising an underlying layer formed of said first material and an overlying layer formed of a fourth material; and   a fourth transistor having a gate stack comprising an underlying layer formed of said third material and an overlying material formed of said fourth material;   wherein each of said first through fourth materials has a respectively different work function;
 whereby each of said first through fourth transistors has a respectively different threshold voltage. 
   
     
     
         2 . The semiconductor device according to  claim 1 , wherein the first material is a layer of a nitrided chemical oxide formed on a semiconductor substrate and wherein the third material is a layer of an oxide formed on said semiconductor substrate, the third material being unnitrided or nitrided to a lesser extent than the first material. 
     
     
         3 . The semiconductor device according to  claim 1 , wherein the second material is a layer of an n work function metal and the third material is a layer of a p work function metal. 
     
     
         4 . The semiconductor device according to  claim 1 , wherein the gate stack of the first and third transistors does not include a layer of said third material and wherein the gate stack of the second and fourth transistors does not include a layer of said first material. 
     
     
         5 . The semiconductor device according to  claim 1 , wherein the gate stack of the third and fourth transistors further comprises a layer of said second material. 
     
     
         6 . The semiconductor device according to  claim 1 , wherein said second material is a high-k dielectric layer doped with atoms of an n work function metal and said fourth material is a high-k dielectric layer doped with atoms of a p work function metal. 
     
     
         7 . The semiconductor device according to  claim 1 , wherein said first material is a high-k dielectric layer and said third material is a high-k dielectric layer in which vacancies within said third material are filled by oxygen to a greater extent than in said first material. 
     
     
         8 . The semiconductor device according to  claim 1 , wherein said second material is a high-k dielectric layer and said fourth material is a high-k dielectric layer in which vacancies within said fourth material are filled by oxygen to a greater extent than in said second material. 
     
     
         9 . The semiconductor device according to  claim 1 , further comprising:
 a fifth transistor having a gate stack comprising an underlying layer formed of said first material and an overlying layer formed of a fifth material; and   a sixth transistor having a gate stack comprising an underlying layer formed of said third material and an overlying layer formed of said fifth material;   wherein said fifth material has a different work function than each of said first through fourth materials;   whereby each of said first through sixth transistors has a respectively different threshold voltage.   
     
     
         10 . The semiconductor device according to  claim 9 , wherein said second material is a high-k dielectric layer doped with atoms of an n work function metal; said fourth material is a high-k dielectric layer doped with atoms of an n work function metal and a p work function metal; and said fifth material is a high-k dielectric layer doped with atoms of a p work function metal. 
     
     
         11 . A semiconductor device comprising:
 a plurality of transistors each having a high-k dielectric layer underlying a gate and overlying a semiconductor substrate;   a first group of said high-k dielectric layers being doped with atoms of an n work function metal, and a second group of said high-k dielectric layers being doped with atoms of a p function work metal;   a first subset of each of said first and second groups of high-k dielectric layers having vacancies that are filled by oxygen to a greater extent than in a second subset of each of said first and second groups of high-k dielectric layers;   whereby each of said plurality of transistors comprises a high-k dielectric layer having one of at least four mutually different work functions.   
     
     
         12 . A method of making a semiconductor device, comprising:
 depositing a layer of a first material on a semiconductor substrate;   modifying selected portions of the first material to create regions of a second material adjoining regions of said first material;   depositing a layer of a third material overlying the layer of first material;   modifying selected portions of the third material to create regions of a fourth material adjoining regions of said third material;   wherein the regions of fourth material and the regions of third material each separately overlap both the regions of first and second material, and wherein the first through fourth materials have respectively different work functions; and   etching the layers to isolate gate stack structures each comprising one of the first and second materials as a lower layer and one of the third and fourth materials as an upper layer.   
     
     
         13 . The method according to  claim 12 , wherein the third material is a high-k dielectric layer doped with atoms of an n work function metal. 
     
     
         14 . The method according to  claim 12 , wherein the fourth material is a high-k dielectric layer doped with atoms of a p work function metal. 
     
     
         15 . The method according to  claim 12 , wherein said first material is a high-k dielectric layer and said second material is a high-k dielectric layer in which vacancies within said second material are filled by oxygen to a greater extent than in said first material. 
     
     
         16 . The method according to  claim 12 , wherein said third material is a high-k dielectric layer and said fourth material is a high-k dielectric layer in which vacancies within said fourth material are filled by oxygen to a greater extent than in said third material. 
     
     
         17 . A method of making a semiconductor device, comprising:
 depositing a region of each of q materials on a semiconductor substrate, wherein q is an integer of 2 or 3;   depositing a region of each of r materials overlying the regions of m materials, wherein r is an integer of 2 or 3;   wherein each of the q materials and each of the r materials has a respectively different work function from all others of the q and r materials;   wherein only one of q and r may equal three; and   etching the regions of the q and r materials to form transistor gate stacks each comprising an underlying q material layer and an overlying r material layer;   thereby to create transistor gates having at least four threshold voltages.   
     
     
         18 . The method according to  claim 17 , wherein one of q and r is 3, thereby to create transistor gates having at least four threshold voltages. 
     
     
         19 . The method according to  claim 17 , further comprising:
 depositing a region of each of s materials separately overlying the regions of q and r materials, wherein s is an integer of 2 or 3;
 thereby to create transistor gates having at least eight threshold voltages.