US2013067203A1PendingUtilityA1

Processing device and a swizzle pattern generator

Assignee: CHUNG MOO-KYOUNGPriority: Sep 14, 2011Filed: Sep 14, 2012Published: Mar 14, 2013
Est. expirySep 14, 2031(~5.2 yrs left)· nominal 20-yr term from priority
G06F 9/30036G06F 9/06G06F 9/30G06F 9/30032
46
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Claims

Abstract

A swizzle pattern generator is provided to reduce an overhead due to execution of a swizzle instruction in vector processing. The swizzle pattern generator is configured to provide swizzle patterns with respect to data sets of at least one vector register or vector processing unit. The swizzle pattern generator may be reconfigurable to generate various swizzle patterns for different vector operations.

Claims

exact text as granted — not AI-modified
1 . A processing device comprising:
 a vector register configured to store a data set including data elements of a vector operation;   a vector processing unit configured to perform the vector operation; and   a swizzle pattern generator connected to the vector register and the vector processing unit configured to create a swizzle pattern with respect to the data set.   
     
     
         2 . The processing device of  claim 1 , wherein the swizzle pattern generator is further configured to combine or change the order of the data elements of the data set to create the swizzle pattern. 
     
     
         3 . The processing device of  claim 1 , further comprising another vector register configured to store another data set including other data elements of the vector operation wherein the swizzle pattern generator is further connected to the another vector register and configured to combine the data elements of the data set and the other data elements of the another data set to create the swizzle pattern. 
     
     
         4 . The processing device of  claim 1 , further comprising another vector register configured to store another data set including other data elements of the vector operation wherein the swizzle pattern generator is further connected to the another vector register and configured to combine the data elements of the data set and the other data elements of the another data set to create the swizzle pattern and another swizzle pattern. 
     
     
         5 . The processing device of  claim 3 , wherein the swizzle pattern is input to the vector processor as a data set for the vector operation. 
     
     
         6 . The processing device of  claim 1 , wherein the swizzle pattern generator includes a swizzling network configured to create the swizzle pattern. 
     
     
         7 . The processing device of  claim 6 , wherein the swizzling network includes a plurality of data lines configured to create the swizzle pattern, each data line having one end connected to an output of the vector register and another end connected to an input of the vector processing unit. 
     
     
         8 . The processing device of  claim 6 , wherein the swizzling network includes a plurality of data lines configured to create the swizzle pattern, each data line having one end connected to an output of the vector processing unit. 
     
     
         9 . The processing device of  claim 6 , wherein the swizzle pattern generator includes a swizzled register configured to store the swizzle pattern. 
     
     
         10 . The processing device of  claim 9 , wherein the swizzling network includes a plurality of data lines configured to create the swizzle pattern, each data line including an end connected to an output of the vector processing unit and another end connected to an input of the swizzled register. 
     
     
         11 . The processing device of  claim 9 , wherein the swizzling network includes a plurality of data lines configured to create the swizzle pattern, each data line including an end connected to an output of the vector register and another end connected to an input of the swizzled register. 
     
     
         12 . The processing device of  claim 1 , wherein the swizzle pattern generator includes a swizzled register configured to store the swizzle pattern. 
     
     
         13 . The processing device of  claim 6 , wherein the swizzling network includes a plurality of data lines that are reconfigurable to create various swizzle patterns. 
     
     
         14 . The processing device of  claim 13 , wherein the swizzling network includes:
 a switch including reconfigurable connections for each of the plurality of data lines configured to generate the various swizzle patterns based on the reconfigurable connections; and   is a switching table connected to the switch configured to store various switch connections for the reconfigurable connections for the plurality of data lines corresponding to the various swizzle patterns.   
     
     
         15 . The processing device of  claim 1 , wherein the swizzle pattern generator is further configured to create the swizzle pattern substantially, simultaneously upon output of the data set from the vector register. 
     
     
         16 . The processing device of  claim 1 , wherein the swizzle pattern generator is further configured to create the swizzle pattern substantially, simultaneously upon input of the data set to the vector register. 
     
     
         17 . A processing device comprising:
 a vector register configured to store a data set related to a vector operation;   a vector processing unit configured to perform the vector operation; and   a swizzle pattern generator connected to an output of the vector register and an input of the vector processing unit configured to combined or change an order of data elements of the data set to create a swizzle pattern as an input for the vector operation.   
     
     
         18 . The processing device of  claim 17  further comprising:
 another vector register configured to store another data set related to the vector operation, wherein 
 the swizzle pattern generator is further connected to an output of the another vector register and is further configured to combined or change an order of data elements of the data set and the another data set to create the swizzle pattern and another second swizzle pattern as an input for the vector operation. 
 
     
     
         19 . A processing device comprising:
 a vector processing unit configured to perform a vector operation;   a vector register configured to store a data set corresponding to a vector operation result received from the vector processing unit;   a swizzling network connected to an output of the vector processing unit configured to combined or change an order of data elements of the data set to create a swizzle pattern simultaneously with storing the data set in the vector register; and   a swizzled register connected to the swizzling network configured to store the swizzle pattern.   
     
     
         20 . The processing device of  claim 19  further comprising:
 another vector register configured to store another data set corresponding to the vector operation result received from the vector processing unit; 
 another swizzled register configured to store another swizzle pattern, wherein 
 the swizzle pattern generator is further configured to combined or change an order of data elements of the data set and the another data set to create the swizzle pattern and the another second swizzle pattern. 
 
     
     
         21 . A swizzle pattern generating apparatus comprising:
 a first data end;   a second data end connected to an output of at least one vector register or a vector processing unit; and   a swizzling network including a plurality of data connections connected to the first data end and the second data end and configured to generate swizzle patterns based on the plurality of data connections at the first data end with respect to data sets output from the at least one vector register or the vector processor.   
     
     
         22 . The apparatus of  claim 21 , wherein the plurality of data connections of the swizzling network are reconfigurable to generate various arrangements of data connections and to generate various swizzle patterns corresponding to the various arrangements of data connections. 
     
     
         23 . The apparatus of  claim 21 , wherein the swizzling network includes:
 a reconfigurable switch configured to make the plurality of data connections from the first end to the second end to generate various swizzle patterns based on an arrangement of the data connections; and   a switching table connected to the switch configured to store various arrangements of data connections from the first end to the second end for the reconfigurable switch corresponding to the various swizzle patterns.   
     
     
         24 . The apparatus of  claim 21 , further comprising at least one swizzled register connected to the first end and configured to store data elements in an order corresponding to the swizzle patterns. 
     
     
         25 . The apparatus of  claim 22 , further comprising at least one swizzled register connected to the first end and configured to store data elements in an order corresponding to the various swizzle patterns. 
     
     
         26 . The swizzle pattern providing apparatus of  claim 21 , wherein data elements output from the swizzling network at the first end provide at least one virtual swizzled register and swizzle patterns corresponding to an arrangement of the output data elements. 
     
     
         27 . The apparatus of  claim 22 , wherein data elements output from the swizzling network at the first end provide at least one virtual swizzled register and swizzle patterns corresponding to the arrangement of the data connections and the output data element each connection.

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