Method for the double-side polishing of a semiconductor wafer

Abstract

A method of simultaneous double-side polishing of a front side and a rear side of at least one wafer composed of semiconductor material includes disposing each wafer in a respective suitably dimensioned cutout in a carrier plate. The at least one wafer is polished on the front side and on the rear side between an upper polishing plate covered with a first polishing pad and a lower polishing plate covered with a second polishing pad while supplying a polishing agent. A respective surface of each of the first and second polishing pads is interrupted by at least one respective channel-shaped depression running spirally from a center to an edge of the respective pad.

What is claimed is: 
     
         1 : A method of simultaneous double-side polishing of at least one wafer having a front side and a rear side and composed of semiconductor material, the method comprising:
 disposing each wafer in a respective suitably dimensioned cutout in a carrier plate;   polishing the at least one wafer on the front side and on the rear side between an upper polishing plate covered with a first polishing pad and a lower polishing plate covered with a second polishing pad while supplying a polishing agent, a respective surface of each of the first and second polishing pads being interrupted by at least one respective channel-shaped depression running spirally from a center to an edge of the respective pad.   
     
     
         2 : The method recited in  claim 1 , wherein the at least one channel-shaped depression running spirally in each polishing pad surface has at least three turns. 
     
     
         3 : The method recited in  claim 1 , wherein a distance W between the turns of the at least one channel-shaped depression running spirally in each polishing pad surface is constant from an inner portion toward an outer portion. 
     
     
         4 : The method recited in  claim 1 , wherein a distance W between turns of the at least one channel-shaped depression running spirally in each polishing pad surface continuously increases from an inner portion toward an outer portion. 
     
     
         5 : The method recited in  claim 1 , wherein a distance W between turns of the at least one channel-shaped depression running spirally in each polishing pad surface continuously decreases from an inner portion toward an outer portion. 
     
     
         6 : The method recited in  claim 1 , wherein each polishing pad surface has three spiral channel-shaped depressions disposed circularly around a midpoint of the respective polishing pad, a distance W between turns of the three spiral channel-shaped depressions continuously increasing from an inner portion to an outer portion, each of the three spiral channel-shaped depressions merging into a circular form enclosing the three spirals in an edge region of the respective polishing pad without there being a connection between the circular channels, and
 wherein an outer edge region is formed by a ring-shaped area in an outer third of the respective polishing pad surface.   
     
     
         7 : The method recited in  claim 1 , wherein a width of each of the at least one channel-shaped depression running spirally in each polishing pad surface continuously increases from an inner portion toward an outer portion. 
     
     
         8 : The method as recited in  claim 1 , wherein a depth of each of at least one channel-shaped depression running spirally in each polishing pad surface continuously increases from an inner portion toward an outer portion. 
     
     
         9 : The method as recited in  claim 1 , wherein each suitably dimensioned circular cutout in the carrier plate is surrounded by three segmented cutouts, each having an identical size and being separated from one another by webs, with a distance among one another of in each case at most 110°, in a ring-shaped manner at a distance A from the circular cutout. 
     
     
         10 : The method as recited in  claim 1 , wherein each semiconductor wafer rotates in the respective suitably dimensioned cutout. 
     
     
         11 : The method as recited in  claim 1 , wherein a rotation of each semiconductor wafer within the respective suitably dimensioned cutout in the carrier plate is prevented by the semiconductor wafer being fixed in the cutout. 
     
     
         12 : The method as recited in  claim 1 , wherein the polishing agent is supplied on the front side and the rear side of the semiconductor wafer in a pressurized manner through openings present both in the upper and in the lower polishing plate and also in the upper and in the lower polishing pad, and wherein nozzles for the polishing agent supply are integrated in the openings in the polishing plate. 
     
     
         13 : The method as recited in  claim 12 , wherein an orientation of openings of the nozzles integrated in the polishing plate for the polishing agent supply or openings in the polishing pad, relative to the polishing pad surface, lie in an angular range of from 45° to 90°. 
     
     
         14 : The method as recited in  claim 13 , wherein a quantity of the polishing agent emerging from the openings into the working gap per unit time in an inner circular region of the polishing pad is higher than a quantity that emerges in the same time from the openings situated in an outer ring-shaped region. 
     
     
         15 : The method as recited in  claim 1 , wherein a front side of the at least one wafer is polished at the upper polishing pad.