US2013075880A1PendingUtilityA1

Packaging structure

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Assignee: CHEN KUO-CHIANGPriority: Aug 29, 2011Filed: Sep 24, 2011Published: Mar 28, 2013
Est. expiryAug 29, 2031(~5.1 yrs left)· nominal 20-yr term from priority
H10W 90/756H10W 90/753H10W 74/111H10W 72/5525H10W 72/5475H10W 90/811H10W 70/481H10W 70/442H10W 72/926H10W 70/464
31
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Claims

Abstract

A packaging structure comprises a first leadframe, a second leadframe, two grounding pins, two first pins, a plurality of first wires, a plurality of second wires, and a package body. The second leadframe is coupled to the drains of a first power transistor and a second power transistor. The two grounding pins are adjacent together and coupled to the first leadframe. The two first pins are coupled to the source of the second power transistor. The two first pins are connected together through a conductive region for increasing capability of loading current. The plurality of first wires is coupled between the source of the second power transistor and the first pin to decrease the internal resistance of the second power transistor. The plurality of second wires is coupled between the first leadframe and the source of the first power transistor to decrease the internal resistance of the first power transistor.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . A packaging structure, comprising:
 a first leadframe, for disposing an integrated circuit;   a second leadframe, for disposing a first power transistor and a second power transistor, and for being electrically coupled to drains of the first power transistor and the second power transistor;   two grounding pins, electrically coupled to the first leadframe, and the two grounding pins being adjacent to each other;   two first pins, for being electrically coupled to a source of the second power transistor, the two first pins connecting to each other through a conductive region, wherein the conductive region is for increasing the capacity of the current loading of the two first pins;   a plurality of first conductive wires, for being electrically coupled between a source of the second power transistor and the two first pins, for reducing the internal resistance of the second power transistor;   a plurality of second conductive wires, for being electrically coupled between the first leadframe and a source of the first power transistor, for reducing the internal resistance of the first power transistor; and   a packaging body, for covering the first leadframe, the second leadframe, the plurality of first conductive wires, the plurality of second conductive wires, the integrated circuit, the first power transistor, and the second power transistor, and partially covering the two grounding pins and the two first pins.   
     
     
         2 . The packaging structure according to  claim 1 , further comprising:
 a second pin, electrically coupled to the second leadframe; and   a third pin, for being electrically coupled to a first contact pad of the integrated circuit through a third conductive wire.   
     
     
         3 . The packaging structure according to  claim 2 , further comprising:
 a fourth pin, for being electrically coupled between a first controlling contact pad of the integrated circuit and a gate of the first power transistor; and   a fifth pin, for being electrically coupled between a second controlling contact pad of the integrated circuit and the gate of the second power transistor.   
     
     
         4 . The packaging structure according to  claim 1 , wherein the diameter of the plurality of first conductive wires and the plurality of second conductive wires is between 1.5 and 2 mils. 
     
     
         5 . The packaging structure according to  claim 3 , wherein the two grounding pins are electrically coupled to a grounding contact pad of the integrated circuit through a sixth conductive wire. 
     
     
         6 . The packaging structure according to  claim 5 , wherein the two power pins are electrically coupled to a power contact pad of the integrated circuit through a seventh conductive wire. 
     
     
         7 . The packaging structure according to  claim 2 , wherein the two power pins are adjacent to each other and electrically coupled together. 
     
     
         8 . The packaging structure according to  claim 1 , wherein the two grounding pins are electrically coupled to the first leadframe through conductive glue. 
     
     
         9 . The packaging structure according to  claim 2 , wherein the second pin is electrically coupled to the second leadframe through conductive glue. 
     
     
         10 . The packaging structure according to  claim 6 , wherein the packaging structure is a thin-shrink small-outline package with eight pins (TSSOP-8).

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