Compact Dual Receiver Architecture for Point to Point Radio

Abstract

A radio frequency receiver comprising a receiver module, an intermediate frequency (“IF”) module, a synthesizer module and a controller module. The receiver module receives a radio frequency signal and provides a baseband in-phase signal and a baseband quadrature signal, eliminates a sideband of the in-phase and quadrature signals to create a first and a second signal, downconverts the first and second signal to a first and a second IF signal, and selects one of the first or second IF signals. The IF module receives the first or second IF signal, performs analog-to-digital conversion on the first or second IF signal, and demodulates the digitally converted IF signal. The synthesizer module receives a programmable reference signal, downconverts the reference signal to an IF feedback signal, downconverts the reference signal to a baseband feedback signal, provides the IF feedback signal to the IF module, and provides the baseband feedback signal to the receiver module. The controller module samples the digitally converted IF signal and provides the programmable reference signal to the synthesizer module to thereby provide a demodulated output signal.

1 . A radio frequency receiver comprising:
 a receiver module which receives a radio frequency (“RF”) signal and provides a baseband in-phase (“I”) signal and a baseband quadrature (“Q”) signal, eliminates a sideband of said I signal and a sideband of said Q signal to create a first and a second signal, downconverts said first and second signal to a first and a second intermediate frequency signal (“IF”), and selects one of said first or second IF signals;   an IF module which receives said first or second IF signal, performs analog-to-digital conversion on said first or second IF signal, and demodulates said digitally converted IF signal;   a synthesizer module which receives a programmable reference signal, downconverts said reference signal to an IF feedback signal, downconverts said reference signal to a baseband feedback signal, provides said IF feedback signal to said IF module, and provides said baseband feedback signal to said receiver module; and   a controller module which samples said digitally converted IF signal and provides said programmable reference signal to said synthesizer module to thereby provide a demodulated output signal.   
     
     
         2 . The receiver of  claim 1  wherein said controller module further comprises a digital detector. 
     
     
         3 . The receiver of  claim 2  wherein said digital detector further comprises a field programmable gate array. 
     
     
         4 . The receiver of  claim 1  further comprising a temperature compensation module. 
     
     
         5 . The receiver of  claim 4  wherein said temperature compensation module includes a temperature sensor located in proximity to said IF module. 
     
     
         6 . The receiver of  claim 1  wherein said receiver is a hitless receiver for a cross polarization interference cancellation (“XPIC”) application. 
     
     
         7 . The receiver of  claim 1  wherein said receiver is a dual port receiver for 1:N space diversity. 
     
     
         8 . The receiver of  claim 1  further comprising a received signal strength indicator (“RSSI”) monitor port. 
     
     
         9 . A radio frequency receiver system comprising:
 an electronics rack having an electrical backplane;   a plurality of radio frequency (“RF”) receivers each operatively connected to said backplane, each receiver comprising:
 a receiver module which receives an RF signal and provides a baseband in-phase (“I”) signal and a baseband quadrature (“Q”) signal, eliminates a sideband of said I signal and a sideband of said Q signal to create a first and a second signal, downconverts said first and second signal to a first and a second intermediate frequency signal (“IF”), and selects one of said first or second IF signals; 
 an IF module which receives said first or second IF signal, performs analog-to-digital conversion on said first or second IF signal, and demodulates said digitally converted IF signal; 
 a synthesizer module which receives a programmable reference signal, downconverts said reference signal to an IF feedback signal, downconverts said reference signal to a baseband feedback signal, provides said IF feedback signal to said IF module, and provides said baseband feedback signal to said receiver module; 
 a programmable reference signal generator which samples said digitally converted IF signal and provides said programmable reference signal to said synthesizer module to thereby provide a demodulated output signal; and 
 a frequency locking circuit; and 
   a data processing unit (“DPU”) operatively connected to said backplane, said DPU having a first and a second common reference signal generator,   wherein each said common reference generator is switchably connected to said programmable reference signal generator via said frequency locking circuit.   
     
     
         10 . The system of  claim 9  wherein said DPU further comprises a second switch adaptable to switch from a first of said plural receivers to a second of said plural receivers. 
     
     
         11 . The system of  claim 10  wherein said switching occurs as a result of an error or failure in said first receiver. 
     
     
         12 . The system of  claim 11  wherein said switching occurs as function of a quality measurement of said RF or IF signal. 
     
     
         13 . The system of  claim 12  wherein said quality measurement is selected from the group consisting of: signal strength, signal to noise ratio, bit error rate, and received power level. 
     
     
         14 . The system of  claim 9  wherein the number of said plural receivers is selected from the group consisting of: two, three, four, five, six, seven, and eight. 
     
     
         15 . The system of  claim 9  wherein said controller module further comprises a digital detector. 
     
     
         16 . The system of  claim 15  wherein said digital detector further comprises a field programmable gate array. 
     
     
         17 . The system of  claim 9  further comprising a temperature compensation module. 
     
     
         18 . The system of  claim 17  wherein said temperature compensation module includes a temperature sensor located in proximity to said IF module. 
     
     
         19 . A method for receiving a signal comprising the steps of:
 providing a co-located modem and receiver in an assembly;   receiving a baseband signal at a receiver module in said receiver;   providing a baseband in-phase (“I”) signal and a baseband quadrature (“Q”) signal;   eliminating a sideband of said I signal and a sideband of said Q signal to create a first and a second signal;   downconverting said first and second signal to a first and a second intermediate frequency (“IF”) signal;   selecting one of said first or second IF signals;   performing analog-to-digital conversion on said first or second IF signal by an IF module;   sampling said digitally converted IF signal;   providing a reference signal as a function of said sampled IF signal;   providing a baseband feedback signal to said receiver module as a function of said reference signal;   providing an IF feedback signal to said IF module as a function of said reference signal; and   demodulating said digitally converted IF signal to thereby provide a demodulated output signal.   
     
     
         20 . The method of  claim 19  further comprising the step of providing thermal compensation for temperature changes in said receiver.