Semiconductor device

Abstract

A semiconductor device includes: a first semiconductor layer; a first electrode provided on a first surface side of the first semiconductor layer; a first insulating layer; and a second semiconductor layer. The first insulating layer is provided between the first semiconductor layer and the first electrode and configured to constrict current flowing between the first semiconductor layer and the first electrode. The second semiconductor layer has a first conductivity type and is provided at least on a path of the current constricted by the first insulating layer. The second semiconductor layer is in contact with the first electrode. The second semiconductor layer contains first impurities at a concentration higher than a concentration of impurities contained in the first semiconductor layer.

1 . A semiconductor device comprising:
 a first semiconductor layer;   a second semiconductor layer of a first conductivity type provided on a surface of the first semiconductor layer and containing first impurities at a concentration higher than a concentration of impurities contained in the first semiconductor layer;   a third semiconductor layer of the first conductivity type selectively formed on the second semiconductor layer and containing first impurities at a concentration higher than the concentration of impurities contained in the second semiconductor layer;   a first electrode provided on the second semiconductor layer and the third semiconductor layer;   a fourth semiconductor layer of a second conductivity type provided on the opposite side of the first semiconductor layer from the first electrode and containing second impurities at a concentration higher than the concentration of impurities contained in the first semiconductor layer; and   a second electrode provided on the opposite side of the fourth semiconductor layer from the first electrode and electrically connected with the fourth semiconductor.   
     
     
         2 . The device according to  claim 1 , wherein the second semiconductor layer and the third semiconductor layer being in direct contact with the second electrode. 
     
     
         3 . The device according to  claim 1 , wherein the third semiconductor layer being apart from the first semiconductor layer via the second semiconductor layer. 
     
     
         4 . The device according to  claim 1 , wherein the first electrode electrically connected with the second semiconductor layer and the third semiconductor layer via a surface including an area consisting of the second semiconductor layer and an area consisting of the third semiconductor layer. 
     
     
         5 . The device according to  claim 1 , wherein the fourth semiconductor layer having constricted current flowing between the fourth semiconductor layer and the second electrode. 
     
     
         6 . The device according to  claim 1 , further comprising a first insulating layer provided between the fourth semiconductor layer and the second electrode and configured to constrict current flowing between the fourth semiconductor layer and the second electrode,
 wherein the fourth semiconductor layer is provided at least on a path of the current constricted by the first insulating layer, is contact with the second electrode, and includes a first portion whose cross section taken along a plane parallel to the surface of the first semiconductor layer is smaller than a cross section of the first semiconductor layer and a cross section of the first insulating layer.   
     
     
         7 . The device according to  claim 6 , wherein the first insulating layer is embedded in a portion of the fourth semiconductor layer except the first portion. 
     
     
         8 . The device according to  claim 6 , wherein the fourth semiconductor layer has a region being contact with the first insulating layer and a region being contact with the second electrode.