Trench MOS Device with Schottky Diode and Method for Manufacturing Same

Abstract

In one embodiment the present invention includes a semiconductor device. The semiconductor device comprises a first semiconductor region, a second semiconductor region and a trench region. The first semiconductor region is of a first conductivity type and a first conductivity concentration. The trench region includes a metal layer in contact with the first semiconductor region to form a metal-semiconductor junction. The second semiconductor region is adjacent to the first semiconductor region that has a second conductivity type and a second conductivity concentration. The second semiconductor region forms a PN junction with the first semiconductor region, and the trench region has a depth such that the metal-semiconductor junction is proximate to the PN junction.

1 . A semiconductor device comprising:
 a first trench having a first top opening at a top surface of the semiconductor device and sidewalls lined with a layer of first dielectric material of a first thickness and filled with a conductive material and covered with a layer of a second dielectric material;   the second dielectric material having a second thickness greater than the first thickness;   the layer of second dielectric material extending over a portion of the top surface adjacent to the top opening;   a second trench having a second top opening at a surface distant from the top surface by the second thickness and a bottom terminated at a first semiconductor region, the second trench filled with a metallic element; and   a metal semiconductor junction between the metallic element and the first semiconductor region, a portion of the junction being a Schottky junction.   
     
     
         2 . The semiconductor device of  claim 1  further comprising a second semiconductor region boarded by the first, the second trench, and the second dielectric material, and doped more heavily with dopant of a first polarity than of a second polarity opposite the first polarity. 
     
     
         3 . The semiconductor device of  claim 2 , in which the Schottky junction is formed between the metallic element and a region of semiconductor doped with dopant of the first polarity. 
     
     
         4 . The semiconductor device of  claim 3 , further comprising a third semiconductor region boarded by the layer of the first dielectric material, the second trench, and the second semiconductor region, and doped more heavily with dopant of the second polarity than of the first polarity, and when under a biasing condition forms an inversion layer in the third semiconductor region adjacent the layer of the first dielectric material. 
     
     
         5 . The semiconductor device of  claim 4 , in which the third semiconductor region forms a p-n junction near the bottom of the second trench. 
     
     
         6 . The semiconductor device of  claim 5 , in which the p-n junction meets the Schottky junction. 
     
     
         7 . The semiconductor device of  claim 1 , in which the second trench reaches deeper into the device than the second trench. 
     
     
         8 . The semiconductor device of  claim 4 , further comprising a trench MOS device with the third semiconductor region as the body region of the MOS device. 
     
     
         9 . The semiconductor device of  claim 1 , in which the second dielectric material is suitable as an etch mask for forming the second trench. 
     
     
         10 . The semiconductor device of  claim 1 , in which the metallic element extends over the second trench and covers a top portion of the second dielectric material layer. 
     
     
         11 . The semiconductor device of  claim 4 , in which the second trench has a sidewall portion below the second dielectric material layer and the metallic element makes contact with the second and third semiconductor regions only at the sidewall portion.