US2013099851A1PendingUtilityA1

Semiconductor device having strain material

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Assignee: YANG HAININGPriority: Nov 19, 2009Filed: Apr 17, 2012Published: Apr 25, 2013
Est. expiryNov 19, 2029(~3.3 yrs left)· nominal 20-yr term from priority
Inventors:Haining Yang
H10D 84/83125H10D 84/8311H10P 14/60H10W 10/17H10W 10/014H10W 70/095H03K 17/687H10B 20/30H10D 84/038H10D 30/60H10D 30/792H10D 84/0167H10B 99/00H10D 84/83H10B 20/00H01L 21/02107H01L 21/486H01L 27/088
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Claims

Abstract

A semiconductor device having strain material is disclosed in a particular embodiment, the semiconductor device includes a first cell including a first gate between a first drain and a first source. The semiconductor device also includes a second cell adjacent to the first cell. The second cell includes a second gate between a second drain and a second source. The semiconductor device further includes a shallow trench isolation area between the first source and the second source. A first amount of strain material over the first source and over the second source is greater than a second amount of strain material over the first drain and over the second drain.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . An apparatus comprising:
 a semiconductor device comprising:
 a first cell comprising a first gate between a first drain and a first source; 
 a second cell adjacent to the first cell, the second cell comprising a second gate between a second drain and a second source; and 
 a shallow trench isolation area between the first source and the second source. 
   wherein a first amount of strain material over the first source and over the second source is greater than a second amount of strain material over the first drain and over the second drain.   
     
     
         2 . The apparatus of  claim 1 , wherein the shallow trench isolation area comprises an isolation material within a substrate of the semiconductor device, and wherein the strain material over the first source and over the second source extends substantially continuously over the shallow trench isolation area. 
     
     
         3 . The apparatus of  claim 1 , wherein the semiconductor device further comprises a dummy gate etch region between the first source and the second source. 
     
     
         4 . The apparatus of  claim 1 , wherein the strain material comprises one of silicon nitride and silicon carbide. 
     
     
         5 . The apparatus of  claim 1 , wherein the first cell comprises an n-type field effect transistor (NFET) device and wherein a shallow trench isolation area is positioned between the first source and the second source. 
     
     
         6 . The apparatus of  claim 1 , wherein the first cell comprises a p-type field effect transistor (PFET) device and wherein the strain material deposited over the first source has a compressive stress. 
     
     
         7 . The apparatus of  claim 1 , wherein the semiconductor device is a memory device. 
     
     
         8 . The apparatus of  claim 7 , wherein the memory device is a read only memory. 
     
     
         9 . The apparatus of  claim 1 , further comprising a device selected from the group consisting of a set top box, a music player, a video player, an entertainment unit, a navigation device, a communications device, a personal digital assistant (PDA), a fixed location data unit, and a computer, into which the semiconductor device is integrated. 
     
     
         10 . A method comprising:
 depositing a first amount of stain material over a first source of a first cell and over a second source of a second cell, wherein the second cell is adjacent to the first cell, and wherein a shallow trench isolation area is positioned between the first source and the second source; and   depositing a second amount of the strain material over a first drain of the first cell and a second drain of the second cell, wherein the first cell comprises a first gate between the first drain and the first source, and wherein the second cell comprises a second gate between the second drain and the second source,   wherein the first amount of the strain material is greater than the second amount of the strain material.   
     
     
         11 . The method of  claim 10 , wherein the shallow trench isolation area comprises an isolation material within a substrate of a semiconductor device, and wherein the strain material over the first source and over the second source extends substantially continuously over the shallow trench isolation area. 
     
     
         12 . The method of  claim 10 , wherein depositing the first amount of the strain material and depositing the second amount of strain material are initiated by a processor integrated into an electronic device. 
     
     
         13 . The method of  claim 10 , further comprising depositing an interlayer dielectric (ILD) material over the strain material. 
     
     
         14 . The method of  claim 13 , further comprising forming a contact through at least a portion of the ILD material. 
     
     
         15 . The method of  claim 14 , further comprising depositing at least one metal layer on the contact. 
     
     
         16 . An apparatus comprising:
 first means for controlling a first electrical path between a first source and a first drain;   second means for controlling a second electrical path between a second source and a second drain;   means for at least partially electrically isolating the first source from the second source; and   means for inducing strain between the first source and the second source and between the first drain and the second drain, wherein the means for inducing strain induces a greater amount of strain between the first source and the second source than between the first drain and the second drain.   
     
     
         17 . The apparatus of  claim 16 , integrated in at least one semiconductor device. 
     
     
         18 . The apparatus of  claim 17 , further comprising a device selected from the group consisting of a set top box, a music player, a video player, an entertainment unit, a navigation device, a communications device, a personal digital assistant (PDA), a fixed location data unit, and a computer, into which the semiconductor device is integrated. 
     
     
         19 . A non-transitory computer-readable medium comprising processor-executable instructions that, when executed by a processor, cause the processor to:
 deposit a first amount of stain material over a first source of a first cell and over a second source of a second cell, wherein the second cell is adjacent to the first cell, and wherein a shallow trench isolation area is positioned between the first source and the second source; and   deposit a second amount of the strain material over a first drain of the first cell and a second drain of the second cell, wherein the first cell comprises a first gate between the first drain and the first source, wherein the second cell comprises a second gate between the second drain and the second source,   wherein the first amount of the strain material is greater than the second amount of the strain material.   
     
     
         20 . The non-transitory computer-readable medium of  claim 19 , wherein a first gate-to-gate distance of a first set of adjacent cells having a common drain and including the first cell is smaller than a second gate-to-gate distance of a second set of adjacent cells having separate sources and including the second cell.

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