US2013132653A1PendingUtilityA1

Data partitioning scheme for non-volatile memories

54
Assignee: APPLE INCPriority: Feb 26, 2010Filed: Jan 14, 2013Published: May 23, 2013
Est. expiryFeb 26, 2030(~3.6 yrs left)· nominal 20-yr term from priority
G06F 12/0246G06F 3/061G06F 3/0643G11C 29/52G06F 2212/7202G06F 11/1068G06F 3/0679G06F 3/0644G06F 3/0652
54
PatentIndex Score
0
Cited by
0
References
0
Claims

Abstract

Systems and methods are disclosed for partitioning data for storage in a non-volatile memory (“NVM”), such as flash memory. In some embodiments, a priority may be assigned to data being stored, and the data may be logically partitioned based on the priority. For example, a file system may identify a logical address within a first predetermined range for higher priority data and within a second predetermined range for lower priority data, such using a union file system. Using the logical address, a NVM driver can determine the priority of data being stored and can process (e.g., encode) the data based on the priority. The NVM driver can store an identifier in the NVM along with the data, and the identifier can indicate the processing techniques used on the associated data.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . A method of storing user data in a non-volatile memory using an electronic system, the method comprising:
 determining a recoverability of user data obtained from an application;   assigning a priority to the user data based on the recoverability; and   partitioning the user data for storage in the non-volatile memory based on the assigned priority.   
     
     
         2 . The method of  claim 1 , wherein the assigning comprises:
 determining whether the user data is backed up to another storage system;   assigning the user data a high priority responsive to determining that the user data is not backed up to another storage system; and   assigning the user data a low priority responsive to determining that the user data is backed up to another storage system.   
     
     
         3 . The method of  claim 1 , wherein the assigning comprises:
 assigning the user data a standard priority when the user data comprises a software program that is non-critical to the operation of the electronic system; and   assigning the user data a high priority when the user data comprises information generated by the software program.   
     
     
         4 . The method of  claim 1 , wherein the assigning comprises:
 determining that the user data is downloadable from a server; and   assigning the user data a high priority responsive to the determining.   
     
     
         5 . The method of  claim 1 , wherein the partitioning comprises logical partitioning. 
     
     
         6 . The method of  claim 1 , wherein the partitioning comprises physical partitioning. 
     
     
         7 . A memory system comprising:
 a user interface;   a non-volatile memory; and   a processor for storing data in the non-volatile memory, wherein the processor is configured to:
 receive, from the user interface, a user indication of a priority of the data; and 
 direct the non-volatile memory to store the data based on the priority. 
   
     
     
         8 . The memory system of  claim 7 , wherein the processor is further configured to prompt a user for the user indication of the priority. 
     
     
         9 . The memory system of  claim 7 , wherein the processor is further configured to indirectly receive the user indication of the priority. 
     
     
         10 . The memory system of  claim 9 , wherein the processor is further configured to:
 receive a user rating of the data; and   interpret the user rating of the data as an indirect user indication of the priority of the data.   
     
     
         11 . The memory system of  claim 9 , wherein the processor is further configured to:
 receive a user request to mark the data for deletion; and   interpret the user request as an indirect user indication to lower the priority of the data.   
     
     
         12 . The memory system of  claim 7 , wherein the processor is further configured to encode the data based on the priority of the data. 
     
     
         13 . The memory system of  claim 7 , further comprising a non-volatile memory controller coupled to the non-volatile memory, wherein the processor is further configured to direct the non-volatile memory controller to encode the data based on the priority of the data. 
     
     
         14 . The memory system of  claim 7 , wherein the non-volatile memory comprises flash memory. 
     
     
         15 . A memory system, comprising:
 a non-volatile memory; and   a host processor for storing data in the non-volatile memory, wherein the host processor is configured with a file system and a memory driver, and wherein the file system is configured to:
 determine a priority associated with the data; 
 identify, based on the priority, a logical address at which to store the data; and 
 provide a write request to the memory driver to program the data in the non-volatile memory, wherein the write request includes the logical address. 
   
     
     
         16 . The memory system of  claim 15 , wherein the file system is further configured to associate the data with a high priority by default. 
     
     
         17 . The memory system of  claim 15 , wherein the host processor is further configured to execute an application, and wherein the file system is further configured to:
 receive, from the application, an indication of the priority associated with the data; and   make the determination of the priority based on the indication.   
     
     
         18 . The memory system of  claim 15 , wherein the file system is configured to determine the logical address by:
 identifying a logical address within a first predetermined range of logical addresses when the data is determined to be associated with a high priority; and   identifying a logical address within a second predetermined range of logical addresses when the data is determined to be associated with a standard priority, wherein the first and second predetermined ranges are non-overlapping.   
     
     
         19 . The memory system of  claim 15 , wherein the non-volatile memory comprises NAND flash memory. 
     
     
         20 . A method of storing data in a non-volatile memory using an electronic system, the method comprising:
 assigning the data a high priority;   storing the data in the non-volatile memory based on the assigned high priority;   determining when the data has been backed up to another storage system;   assigning the data a standard priority subsequent to the determination; and   programming the data in the non-volatile memory based on the assigned standard priority.   
     
     
         21 . The method of  claim 20 , further comprising:
 identifying a first logical address within a first predetermined range of logical addresses responsive to assigning the data the high priority, wherein the storing is performed based on the first logical address; and   identifying a second logical address within a second predetermined range of logical addresses responsive to assigning the data the standard priority, wherein the programming is performed based on the second logical address.   
     
     
         22 . The method of  claim 21 , further comprising, in response to determining that the data has been backed up to another storage system:
 reading the data from the non-volatile memory using the first logical address; and   associating the second logical address with the data read from the non-volatile memory.   
     
     
         23 . The method of  claim 20 , further comprising:
 in response to determining that the data has been backed up to another storage system, marking the data to be moved in the non-volatile memory; and   waiting until a condition is detected to perform the programming of the marked data.   
     
     
         24 . An electronic system comprising:
 a non-volatile memory; and   a processor configured to execute a plurality of modules to store user data in the non-volatile memory, the plurality of modules comprising:
 a union file system comprising a first file system and a second file system, wherein the union file system provides the user data to the first file system to indicate that the user data has a higher priority or to a second file system to indicate that the user data has a lower priority; and 
 a memory driver for receiving write requests from the union file system and directing the non-volatile memory to store the user data. 
   
     
     
         25 . The electronic system of  claim 24 , wherein
 the first file system is configured to identify logical addresses within a first predetermined range; and   the second file system is configured to identify logical addresses within a second predetermined range, wherein the first and second predetermined ranges do not overlap.   
     
     
         26 . The electronic system of  claim 24 , wherein plurality of modules further comprises an application for:
 assigning the user data to one of the higher priority and the lower priority; and   providing, to the file system, the user data and a request to store the user data.   
     
     
         27 . The electronic system of  claim 26 , wherein the first file system comprises a read/write file system, and wherein the user data is provided from the application to the first file system by default. 
     
     
         28 . The electronic system of  claim 24 , wherein the second file system comprises a read only file system, and wherein the user data is provided from the first file system to the second file system responsive to backing up the user data on another storage medium. 
     
     
         29 . The electronic system of  claim 24 , wherein the at least one non-volatile memory device comprises flash memory. 
     
     
         30 .- 41 . (canceled) 
     
     
         42 . A method of reading data from a non-volatile memory, the method comprising:
 identifying a block of the non-volatile memory to access;   reading a first portion of the block to access a first identifier;   selecting an error correcting code based on the first identifier;   reading a second portion of the block to access data; and   decoding the data using the selected error correcting code.   
     
     
         43 . The method of  claim 42 , wherein
 the first portion of the block is cached in a main memory, and wherein the reading the first portion comprises reading a cached version of the first portion from the main memory.   
     
     
         44 . The method of  claim 42 , further comprising:
 decoding the first identifier using a default error correcting code.   
     
     
         45 . The method of  claim 43 , further comprising:
 determining, based on the decoding, whether errors present in the first identifier are correctable;   responsive to determining that the errors are not correctable, reading a third portion of the block for a second identifier; and   decoding the second identifier using the default error correcting code.   
     
     
         46 . The method of  claim 43 , wherein the selecting comprises choosing between a first error correcting code and a second error correcting code having different correcting capabilities, and wherein the default error correcting code corresponds to one of the first error correcting code and the second error correcting code. 
     
     
         47 . The method of  claim 42 , wherein:
 the non-volatile memory comprises flash memory;   the identified block comprises a plurality of pages; and   the reading the first portion comprises reading at least one of the pages of the identified block.

Cited by (0)

No later patents cite this yet.

References (0)

No backward citations on record.